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drm/amd/display: Enable SST DSC in DM

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In create_stream_for_sink, check for SST DP connectors

Parse DSC caps to DC format, then, if DSC is supported,
compute the config

DSC hardware will be programmed by dc_commit_state

Tested-by: Mikita Lipski <Mikita.Lipski@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
David Francis 2019-06-19 14:30:59 -04:00 committed by Alex Deucher
parent 5cb99d46f7
commit df2f10151d
2 changed files with 24 additions and 12 deletions
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32
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -3517,6 +3517,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
bool scale = dm_state ? (dm_state->scaling != RMX_OFF) : false; bool scale = dm_state ? (dm_state->scaling != RMX_OFF) : false;
int mode_refresh; int mode_refresh;
int preferred_refresh = 0; int preferred_refresh = 0;
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
struct dsc_dec_dpcd_caps dsc_caps;
uint32_t link_bandwidth_kbps;
#endif
struct dc_sink *sink = NULL; struct dc_sink *sink = NULL;
if (aconnector == NULL) { if (aconnector == NULL) {
@ -3589,17 +3593,23 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
&mode, &aconnector->base, con_state, old_stream); &mode, &aconnector->base, con_state, old_stream);
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
/* stream->timing.flags.DSC = 0; */ stream->timing.flags.DSC = 0;
/* */
/* if (aconnector->dc_link && */ if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT) {
/* aconnector->dc_link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT #<{(|&& */ dc_dsc_parse_dsc_dpcd(aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
/* aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.is_dsc_supported|)}>#) */ aconnector->dc_link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,
/* if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc, */ &dsc_caps);
/* &aconnector->dc_link->dpcd_caps.dsc_caps, */ link_bandwidth_kbps = dc_link_bandwidth_kbps(aconnector->dc_link,
/* dc_link_bandwidth_kbps(aconnector->dc_link, dc_link_get_link_cap(aconnector->dc_link)), */ dc_link_get_link_cap(aconnector->dc_link));
/* &stream->timing, */
/* &stream->timing.dsc_cfg)) */ if (dsc_caps.is_dsc_supported)
/* stream->timing.flags.DSC = 1; */ if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc,
&dsc_caps,
link_bandwidth_kbps,
&stream->timing,
&stream->timing.dsc_cfg))
stream->timing.flags.DSC = 1;
}
#endif #endif
update_stream_scaling_settings(&mode, dm_state, stream); update_stream_scaling_settings(&mode, dm_state, stream);

4
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
View File

@ -548,7 +548,9 @@ bool dm_helpers_dp_write_dsc_enable(
bool enable bool enable
) )
{ {
return false; uint8_t enable_dsc = enable ? 1 : 0;
return dm_helpers_dp_write_dpcd(ctx, stream->sink->link, DP_DSC_ENABLE, &enable_dsc, 1);
} }
#endif #endif