watchdog: jz4740: Use register names from <linux/mfd/ingenic-tcu.h>
Use the macros from <linux/mfd/ingenic-tcu.h> instead of declaring our own. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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@ -4,6 +4,7 @@
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* JZ4740 Watchdog driver
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*/
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#include <linux/mfd/ingenic-tcu.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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@ -19,23 +20,16 @@
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#include <asm/mach-jz4740/timer.h>
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#define JZ_REG_WDT_TIMER_DATA 0x0
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#define JZ_REG_WDT_COUNTER_ENABLE 0x4
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#define JZ_REG_WDT_TIMER_COUNTER 0x8
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#define JZ_REG_WDT_TIMER_CONTROL 0xC
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#define JZ_WDT_CLOCK_PCLK 0x1
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#define JZ_WDT_CLOCK_RTC 0x2
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#define JZ_WDT_CLOCK_EXT 0x4
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#define JZ_WDT_CLOCK_DIV_SHIFT 3
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#define JZ_WDT_CLOCK_DIV_1 (0 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_4 (1 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_16 (2 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_64 (3 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_256 (4 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_1024 (5 << JZ_WDT_CLOCK_DIV_SHIFT)
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#define JZ_WDT_CLOCK_DIV_1 (0 << TCU_TCSR_PRESCALE_LSB)
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#define JZ_WDT_CLOCK_DIV_4 (1 << TCU_TCSR_PRESCALE_LSB)
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#define JZ_WDT_CLOCK_DIV_16 (2 << TCU_TCSR_PRESCALE_LSB)
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#define JZ_WDT_CLOCK_DIV_64 (3 << TCU_TCSR_PRESCALE_LSB)
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#define JZ_WDT_CLOCK_DIV_256 (4 << TCU_TCSR_PRESCALE_LSB)
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#define JZ_WDT_CLOCK_DIV_1024 (5 << TCU_TCSR_PRESCALE_LSB)
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#define DEFAULT_HEARTBEAT 5
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#define MAX_HEARTBEAT 2048
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@ -63,7 +57,7 @@ static int jz4740_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
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writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER);
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writew(0x0, drvdata->base + TCU_REG_WDT_TCNT);
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return 0;
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}
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@ -86,18 +80,17 @@ static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev,
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break;
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}
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timeout_value >>= 2;
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clock_div += (1 << JZ_WDT_CLOCK_DIV_SHIFT);
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clock_div += (1 << TCU_TCSR_PRESCALE_LSB);
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}
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writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE);
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writew(clock_div, drvdata->base + JZ_REG_WDT_TIMER_CONTROL);
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writeb(0x0, drvdata->base + TCU_REG_WDT_TCER);
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writew(clock_div, drvdata->base + TCU_REG_WDT_TCSR);
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writew((u16)timeout_value, drvdata->base + JZ_REG_WDT_TIMER_DATA);
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writew(0x0, drvdata->base + JZ_REG_WDT_TIMER_COUNTER);
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writew(clock_div | JZ_WDT_CLOCK_RTC,
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drvdata->base + JZ_REG_WDT_TIMER_CONTROL);
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writew((u16)timeout_value, drvdata->base + TCU_REG_WDT_TDR);
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writew(0x0, drvdata->base + TCU_REG_WDT_TCNT);
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writew(clock_div | JZ_WDT_CLOCK_RTC, drvdata->base + TCU_REG_WDT_TCSR);
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writeb(0x1, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE);
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writeb(0x1, drvdata->base + TCU_REG_WDT_TCER);
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wdt_dev->timeout = new_timeout;
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return 0;
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@ -115,7 +108,7 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
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writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE);
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writeb(0x0, drvdata->base + TCU_REG_WDT_TCER);
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jz4740_timer_disable_watchdog();
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return 0;
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