forked from Minki/linux
[PATCH] mipsnet: Virtual ethernet driver for MIPSsim.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 drivers/net/mipsnet.c | 371 ++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/mipsnet.h | 127 +++++++++++++++++ 4 files changed, 507 insertions(+) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
parent
9cc975e00d
commit
dcbf847756
@ -475,6 +475,14 @@ config SGI_IOC3_ETH_HW_TX_CSUM
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the moment only acceleration of IPv4 is supported. This option
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enables offloading for checksums on transmit. If unsure, say Y.
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config MIPS_SIM_NET
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tristate "MIPS simulator Network device (EXPERIMENTAL)"
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depends on NETDEVICES && MIPS_SIM && EXPERIMENTAL
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help
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The MIPSNET device is a simple Ethernet network device which is
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emulated by the MIPS Simulator.
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If you are not using a MIPSsim or are unsure, say N.
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config SGI_O2MACE_ETH
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tristate "SGI O2 MACE Fast Ethernet support"
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depends on NET_ETHERNET && SGI_IP32=y
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@ -167,6 +167,7 @@ obj-$(CONFIG_EQUALIZER) += eql.o
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obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
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obj-$(CONFIG_MIPS_GT96100ETH) += gt96100eth.o
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obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
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obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
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obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
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obj-$(CONFIG_DECLANCE) += declance.o
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obj-$(CONFIG_ATARILANCE) += atarilance.o
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371
drivers/net/mipsnet.c
Normal file
371
drivers/net/mipsnet.c
Normal file
@ -0,0 +1,371 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DEBUG
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/sched.h>
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#include <linux/etherdevice.h>
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#include <linux/netdevice.h>
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#include <asm/io.h>
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#include <asm/mips-boards/simint.h>
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#include "mipsnet.h" /* actual device IO mapping */
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#define MIPSNET_VERSION "2005-06-20"
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#define mipsnet_reg_address(dev, field) (dev->base_addr + field_offset(field))
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struct mipsnet_priv {
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struct net_device_stats stats;
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};
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static struct platform_device *mips_plat_dev;
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static char mipsnet_string[] = "mipsnet";
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/*
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* Copy data from the MIPSNET rx data port
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*/
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static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
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int len)
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{
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uint32_t available_len = inl(mipsnet_reg_address(dev, rxDataCount));
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if (available_len < len)
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return -EFAULT;
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for (; len > 0; len--, kdata++) {
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*kdata = inb(mipsnet_reg_address(dev, rxDataBuffer));
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}
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return inl(mipsnet_reg_address(dev, rxDataCount));
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}
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static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
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struct sk_buff *skb)
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{
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int count_to_go = skb->len;
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char *buf_ptr = skb->data;
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struct mipsnet_priv *mp = netdev_priv(dev);
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pr_debug("%s: %s(): telling MIPSNET txDataCount(%d)\n",
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dev->name, __FUNCTION__, skb->len);
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outl(skb->len, mipsnet_reg_address(dev, txDataCount));
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pr_debug("%s: %s(): sending data to MIPSNET txDataBuffer(%d)\n",
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dev->name, __FUNCTION__, skb->len);
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for (; count_to_go; buf_ptr++, count_to_go--) {
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outb(*buf_ptr, mipsnet_reg_address(dev, txDataBuffer));
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}
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mp->stats.tx_packets++;
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mp->stats.tx_bytes += skb->len;
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return skb->len;
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}
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static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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pr_debug("%s:%s(): transmitting %d bytes\n",
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dev->name, __FUNCTION__, skb->len);
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/* Only one packet at a time. Once TXDONE interrupt is serviced, the
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* queue will be restarted.
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*/
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netif_stop_queue(dev);
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mipsnet_put_todevice(dev, skb);
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return 0;
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}
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static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
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{
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struct sk_buff *skb;
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size_t len = count;
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struct mipsnet_priv *mp = netdev_priv(dev);
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if (!(skb = alloc_skb(len + 2, GFP_KERNEL))) {
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mp->stats.rx_dropped++;
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return -ENOMEM;
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}
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skb_reserve(skb, 2);
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if (ioiocpy_frommipsnet(dev, skb_put(skb, len), len))
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return -EFAULT;
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skb->dev = dev;
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skb->protocol = eth_type_trans(skb, dev);
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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pr_debug("%s:%s(): pushing RXed data to kernel\n",
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dev->name, __FUNCTION__);
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netif_rx(skb);
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mp->stats.rx_packets++;
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mp->stats.rx_bytes += len;
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return count;
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}
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static irqreturn_t
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mipsnet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct net_device *dev = dev_id;
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irqreturn_t retval = IRQ_NONE;
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uint64_t interruptFlags;
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if (irq == dev->irq) {
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pr_debug("%s:%s(): irq %d for device\n",
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dev->name, __FUNCTION__, irq);
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retval = IRQ_HANDLED;
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interruptFlags =
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inl(mipsnet_reg_address(dev, interruptControl));
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pr_debug("%s:%s(): intCtl=0x%016llx\n", dev->name,
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__FUNCTION__, interruptFlags);
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if (interruptFlags & MIPSNET_INTCTL_TXDONE) {
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pr_debug("%s:%s(): got TXDone\n",
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dev->name, __FUNCTION__);
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outl(MIPSNET_INTCTL_TXDONE,
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mipsnet_reg_address(dev, interruptControl));
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// only one packet at a time, we are done.
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netif_wake_queue(dev);
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} else if (interruptFlags & MIPSNET_INTCTL_RXDONE) {
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pr_debug("%s:%s(): got RX data\n",
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dev->name, __FUNCTION__);
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mipsnet_get_fromdev(dev,
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inl(mipsnet_reg_address(dev, rxDataCount)));
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pr_debug("%s:%s(): clearing RX int\n",
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dev->name, __FUNCTION__);
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outl(MIPSNET_INTCTL_RXDONE,
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mipsnet_reg_address(dev, interruptControl));
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} else if (interruptFlags & MIPSNET_INTCTL_TESTBIT) {
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pr_debug("%s:%s(): got test interrupt\n",
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dev->name, __FUNCTION__);
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// TESTBIT is cleared on read.
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// And takes effect after a write with 0
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outl(0, mipsnet_reg_address(dev, interruptControl));
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} else {
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pr_debug("%s:%s(): no valid fags 0x%016llx\n",
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dev->name, __FUNCTION__, interruptFlags);
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// Maybe shared IRQ, just ignore, no clearing.
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retval = IRQ_NONE;
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}
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} else {
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printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
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dev->name, __FUNCTION__, irq);
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retval = IRQ_NONE;
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}
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return retval;
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} //mipsnet_interrupt()
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static int mipsnet_open(struct net_device *dev)
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{
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int err;
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pr_debug("%s: mipsnet_open\n", dev->name);
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err = request_irq(dev->irq, &mipsnet_interrupt,
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SA_SHIRQ, dev->name, (void *) dev);
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if (err) {
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pr_debug("%s: %s(): can't get irq %d\n",
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dev->name, __FUNCTION__, dev->irq);
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release_region(dev->base_addr, MIPSNET_IO_EXTENT);
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return err;
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}
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pr_debug("%s: %s(): got IO region at 0x%04lx and irq %d for dev.\n",
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dev->name, __FUNCTION__, dev->base_addr, dev->irq);
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netif_start_queue(dev);
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// test interrupt handler
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outl(MIPSNET_INTCTL_TESTBIT,
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mipsnet_reg_address(dev, interruptControl));
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return 0;
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}
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static int mipsnet_close(struct net_device *dev)
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{
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pr_debug("%s: %s()\n", dev->name, __FUNCTION__);
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netif_stop_queue(dev);
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return 0;
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}
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static struct net_device_stats *mipsnet_get_stats(struct net_device *dev)
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{
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struct mipsnet_priv *mp = netdev_priv(dev);
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return &mp->stats;
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}
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static void mipsnet_set_mclist(struct net_device *dev)
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{
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// we don't do anything
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return;
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}
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static int __init mipsnet_probe(struct device *dev)
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{
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struct net_device *netdev;
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int err;
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netdev = alloc_etherdev(sizeof(struct mipsnet_priv));
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if (!netdev) {
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err = -ENOMEM;
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goto out;
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}
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dev_set_drvdata(dev, netdev);
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netdev->open = mipsnet_open;
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netdev->stop = mipsnet_close;
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netdev->hard_start_xmit = mipsnet_xmit;
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netdev->get_stats = mipsnet_get_stats;
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netdev->set_multicast_list = mipsnet_set_mclist;
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/*
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* TODO: probe for these or load them from PARAM
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*/
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netdev->base_addr = 0x4200;
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netdev->irq = MIPSCPU_INT_BASE + MIPSCPU_INT_MB0 +
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inl(mipsnet_reg_address(netdev, interruptInfo));
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// Get the io region now, get irq on open()
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if (!request_region(netdev->base_addr, MIPSNET_IO_EXTENT, "mipsnet")) {
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pr_debug("%s: %s(): IO region {start: 0x%04lux, len: %d} "
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"for dev is not availble.\n", netdev->name,
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__FUNCTION__, netdev->base_addr, MIPSNET_IO_EXTENT);
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err = -EBUSY;
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goto out_free_netdev;
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}
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/*
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* Lacking any better mechanism to allocate a MAC address we use a
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* random one ...
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*/
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random_ether_addr(netdev->dev_addr);
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err = register_netdev(netdev);
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if (err) {
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printk(KERN_ERR "MIPSNet: failed to register netdev.\n");
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goto out_free_region;
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}
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return 0;
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out_free_region:
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release_region(netdev->base_addr, MIPSNET_IO_EXTENT);
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out_free_netdev:
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free_netdev(netdev);
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out:
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return err;
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}
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static int __devexit mipsnet_device_remove(struct device *device)
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{
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struct net_device *dev = dev_get_drvdata(device);
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unregister_netdev(dev);
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release_region(dev->base_addr, MIPSNET_IO_EXTENT);
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free_netdev(dev);
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dev_set_drvdata(device, NULL);
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return 0;
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}
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static struct device_driver mipsnet_driver = {
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.name = mipsnet_string,
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.bus = &platform_bus_type,
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.probe = mipsnet_probe,
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.remove = __devexit_p(mipsnet_device_remove),
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};
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static void mipsnet_platform_release(struct device *device)
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{
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struct platform_device *pldev;
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/* free device */
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pldev = to_platform_device(device);
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kfree(pldev);
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}
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static int __init mipsnet_init_module(void)
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{
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struct platform_device *pldev;
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int err;
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printk(KERN_INFO "MIPSNet Ethernet driver. Version: %s. "
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"(c)2005 MIPS Technologies, Inc.\n", MIPSNET_VERSION);
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if (driver_register(&mipsnet_driver)) {
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printk(KERN_ERR "Driver registration failed\n");
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err = -ENODEV;
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goto out;
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}
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if (!(pldev = kmalloc (sizeof (*pldev), GFP_KERNEL))) {
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err = -ENOMEM;
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goto out_unregister_driver;
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}
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memset (pldev, 0, sizeof (*pldev));
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pldev->name = mipsnet_string;
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pldev->id = 0;
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pldev->dev.release = mipsnet_platform_release;
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if (platform_device_register(pldev)) {
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err = -ENODEV;
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goto out_free_pldev;
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}
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if (!pldev->dev.driver) {
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/*
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* The driver was not bound to this device, there was
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* no hardware at this address. Unregister it, as the
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* release fuction will take care of freeing the
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* allocated structure
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*/
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platform_device_unregister (pldev);
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}
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mips_plat_dev = pldev;
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return 0;
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out_free_pldev:
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kfree(pldev);
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out_unregister_driver:
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driver_unregister(&mipsnet_driver);
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out:
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return err;
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}
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static void __exit mipsnet_exit_module(void)
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{
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pr_debug("MIPSNet Ethernet driver exiting\n");
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driver_unregister(&mipsnet_driver);
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}
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module_init(mipsnet_init_module);
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module_exit(mipsnet_exit_module);
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127
drivers/net/mipsnet.h
Normal file
127
drivers/net/mipsnet.h
Normal file
@ -0,0 +1,127 @@
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//
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// <COPYRIGHT CLASS="1B" YEAR="2005">
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// Unpublished work (c) MIPS Technologies, Inc. All rights reserved.
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// Unpublished rights reserved under the copyright laws of the U.S.A. and
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// other countries.
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//
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// PROPRIETARY / SECRET CONFIDENTIAL INFORMATION OF MIPS TECHNOLOGIES, INC.
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// FOR INTERNAL USE ONLY.
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//
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// Under no circumstances (contract or otherwise) may this information be
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// disclosed to, or copied, modified or used by anyone other than employees
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// or contractors of MIPS Technologies having a need to know.
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// </COPYRIGHT>
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//
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//++
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// File: MIPS_Net.h
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//
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// Description:
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// The definition of the emulated MIPSNET device's interface.
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//
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// Notes: This include file needs to work from a Linux device drivers.
|
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//
|
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//--
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//
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|
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#ifndef __MIPSNET_H
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#define __MIPSNET_H
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/*
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* Id of this Net device, as seen by the core.
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*/
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#define MIPS_NET_DEV_ID ((uint64_t) \
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((uint64_t)'M'<< 0)| \
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((uint64_t)'I'<< 8)| \
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((uint64_t)'P'<<16)| \
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((uint64_t)'S'<<24)| \
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((uint64_t)'N'<<32)| \
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((uint64_t)'E'<<40)| \
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((uint64_t)'T'<<48)| \
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((uint64_t)'0'<<56))
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|
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/*
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* Net status/control block as seen by sw in the core.
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* (Why not use bit fields? can't be bothered with cross-platform struct
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* packing.)
|
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*/
|
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typedef struct _net_control_block {
|
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/// dev info for probing
|
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/// reads as MIPSNET%d where %d is some form of version
|
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uint64_t devId; /*0x00 */
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|
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/*
|
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* read only busy flag.
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* Set and cleared by the Net Device to indicate that an rx or a tx
|
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* is in progress.
|
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*/
|
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uint32_t busy; /*0x08 */
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|
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/*
|
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* Set by the Net Device.
|
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* The device will set it once data has been received.
|
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* The value is the number of bytes that should be read from
|
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* rxDataBuffer. The value will decrease till 0 until all the data
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* from rxDataBuffer has been read.
|
||||
*/
|
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uint32_t rxDataCount; /*0x0c */
|
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#define MIPSNET_MAX_RXTX_DATACOUNT (1<<16)
|
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|
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/*
|
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* Settable from the MIPS core, cleared by the Net Device.
|
||||
* The core should set the number of bytes it wants to send,
|
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* then it should write those bytes of data to txDataBuffer.
|
||||
* The device will clear txDataCount has been processed (not necessarily sent).
|
||||
*/
|
||||
uint32_t txDataCount; /*0x10 */
|
||||
|
||||
/*
|
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* Interrupt control
|
||||
*
|
||||
* Used to clear the interrupted generated by this dev.
|
||||
* Write a 1 to clear the interrupt. (except bit31).
|
||||
*
|
||||
* Bit0 is set if it was a tx-done interrupt.
|
||||
* Bit1 is set when new rx-data is available.
|
||||
* Until this bit is cleared there will be no other RXs.
|
||||
*
|
||||
* Bit31 is used for testing, it clears after a read.
|
||||
* Writing 1 to this bit will cause an interrupt to be generated.
|
||||
* To clear the test interrupt, write 0 to this register.
|
||||
*/
|
||||
uint32_t interruptControl; /*0x14 */
|
||||
#define MIPSNET_INTCTL_TXDONE ((uint32_t)(1<< 0))
|
||||
#define MIPSNET_INTCTL_RXDONE ((uint32_t)(1<< 1))
|
||||
#define MIPSNET_INTCTL_TESTBIT ((uint32_t)(1<<31))
|
||||
#define MIPSNET_INTCTL_ALLSOURCES (MIPSNET_INTCTL_TXDONE|MIPSNET_INTCTL_RXDONE|MIPSNET_INTCTL_TESTBIT)
|
||||
|
||||
/*
|
||||
* Readonly core-specific interrupt info for the device to signal the core.
|
||||
* The meaning of the contents of this field might change.
|
||||
*/
|
||||
/*###\todo: the whole memIntf interrupt scheme is messy: the device should have
|
||||
* no control what so ever of what VPE/register set is being used.
|
||||
* The MemIntf should only expose interrupt lines, and something in the
|
||||
* config should be responsible for the line<->core/vpe bindings.
|
||||
*/
|
||||
uint32_t interruptInfo; /*0x18 */
|
||||
|
||||
/*
|
||||
* This is where the received data is read out.
|
||||
* There is more data to read until rxDataReady is 0.
|
||||
* Only 1 byte at this regs offset is used.
|
||||
*/
|
||||
uint32_t rxDataBuffer; /*0x1c */
|
||||
|
||||
/*
|
||||
* This is where the data to transmit is written.
|
||||
* Data should be written for the amount specified in the txDataCount register.
|
||||
* Only 1 byte at this regs offset is used.
|
||||
*/
|
||||
uint32_t txDataBuffer; /*0x20 */
|
||||
} MIPS_T_NetControl;
|
||||
|
||||
#define MIPSNET_IO_EXTENT 0x40 /* being generous */
|
||||
|
||||
#define field_offset(field) ((int)&((MIPS_T_NetControl*)(0))->field)
|
||||
|
||||
#endif /* __MIPSNET_H */
|
Loading…
Reference in New Issue
Block a user