forked from Minki/linux
ARM: OMAP2+: gpmc: minimal driver support
Create a minimal driver out of gpmc code. Responsibilities handled by earlier gpmc initialization is now achieved in probe. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: fixed some checkpatch messages] Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Afzal Mohammed
Paul Walmsley
parent
4be48fd53b
commit
da49687397
@ -24,6 +24,7 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <asm/mach-types.h>
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#include <plat/gpmc.h>
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@ -86,6 +87,12 @@
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#define ENABLE_PREFETCH (0x1 << 7)
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#define DMA_MPU_MODE 2
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#define GPMC_REVISION_MAJOR(l) ((l >> 4) & 0xf)
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#define GPMC_REVISION_MINOR(l) (l & 0xf)
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#define GPMC_HAS_WR_ACCESS 0x1
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#define GPMC_HAS_WR_DATA_MUX_BUS 0x2
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/* XXX: Only NAND irq has been considered,currently these are the only ones used
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*/
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#define GPMC_NR_IRQ 2
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@ -131,7 +138,10 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM];
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static DEFINE_SPINLOCK(gpmc_mem_lock);
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static unsigned int gpmc_cs_map; /* flag for cs which are initialized */
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static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */
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static struct device *gpmc_dev;
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static int gpmc_irq;
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static resource_size_t phys_base, mem_size;
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static unsigned gpmc_capability;
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static void __iomem *gpmc_base;
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static struct clk *gpmc_l3_clk;
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@ -321,10 +331,10 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
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GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
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if (cpu_is_omap34xx()) {
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if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS)
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GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus);
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if (gpmc_capability & GPMC_HAS_WR_ACCESS)
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GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access);
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}
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/* caller is expected to have initialized CONFIG1 to cover
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* at least sync vs async
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@ -434,6 +444,20 @@ static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size)
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return r;
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}
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static int gpmc_cs_delete_mem(int cs)
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{
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struct resource *res = &gpmc_cs_mem[cs];
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int r;
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spin_lock(&gpmc_mem_lock);
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r = release_resource(&gpmc_cs_mem[cs]);
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res->start = 0;
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res->end = 0;
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spin_unlock(&gpmc_mem_lock);
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return r;
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}
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int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
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{
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struct resource *res = &gpmc_cs_mem[cs];
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@ -770,7 +794,7 @@ static void gpmc_irq_noop(struct irq_data *data) { }
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static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; }
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static int gpmc_setup_irq(int gpmc_irq)
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static int gpmc_setup_irq(void)
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{
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int i;
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u32 regval;
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@ -814,7 +838,37 @@ static int gpmc_setup_irq(int gpmc_irq)
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return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
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}
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static void __init gpmc_mem_init(void)
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static __exit int gpmc_free_irq(void)
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{
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int i;
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if (gpmc_irq)
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free_irq(gpmc_irq, NULL);
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for (i = 0; i < GPMC_NR_IRQ; i++) {
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irq_set_handler(gpmc_client_irq[i].irq, NULL);
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irq_set_chip(gpmc_client_irq[i].irq, &no_irq_chip);
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irq_modify_status(gpmc_client_irq[i].irq, 0, 0);
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}
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irq_free_descs(gpmc_irq_start, GPMC_NR_IRQ);
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return 0;
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}
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static void __devexit gpmc_mem_exit(void)
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{
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int cs;
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for (cs = 0; cs < GPMC_CS_NUM; cs++) {
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if (!gpmc_cs_mem_enabled(cs))
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continue;
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gpmc_cs_delete_mem(cs);
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}
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}
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static void __devinit gpmc_mem_init(void)
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{
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int cs;
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unsigned long boot_rom_space = 0;
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@ -841,65 +895,85 @@ static void __init gpmc_mem_init(void)
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}
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}
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static int __init gpmc_init(void)
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static __devinit int gpmc_probe(struct platform_device *pdev)
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{
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u32 l;
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int ret = -EINVAL;
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int gpmc_irq;
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char *ck = NULL;
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struct resource *res;
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if (cpu_is_omap24xx()) {
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ck = "core_l3_ck";
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if (cpu_is_omap2420())
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l = OMAP2420_GPMC_BASE;
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else
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l = OMAP34XX_GPMC_BASE;
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gpmc_irq = 20 + OMAP_INTC_START;
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} else if (cpu_is_omap34xx()) {
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ck = "gpmc_fck";
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l = OMAP34XX_GPMC_BASE;
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gpmc_irq = 20 + OMAP_INTC_START;
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} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
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/* Base address and irq number are same for OMAP4/5 */
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ck = "gpmc_ck";
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l = OMAP44XX_GPMC_BASE;
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gpmc_irq = 20 + OMAP44XX_IRQ_GIC_START;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL)
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return -ENOENT;
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if (WARN_ON(!ck))
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return ret;
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phys_base = res->start;
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mem_size = resource_size(res);
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gpmc_l3_clk = clk_get(NULL, ck);
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if (IS_ERR(gpmc_l3_clk)) {
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printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
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BUG();
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}
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gpmc_base = ioremap(l, SZ_4K);
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gpmc_base = devm_request_and_ioremap(&pdev->dev, res);
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if (!gpmc_base) {
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clk_put(gpmc_l3_clk);
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printk(KERN_ERR "Could not get GPMC register memory\n");
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BUG();
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dev_err(&pdev->dev, "error: request memory / ioremap\n");
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return -EADDRNOTAVAIL;
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}
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (res == NULL)
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dev_warn(&pdev->dev, "Failed to get resource: irq\n");
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else
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gpmc_irq = res->start;
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gpmc_l3_clk = clk_get(&pdev->dev, "fck");
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if (IS_ERR(gpmc_l3_clk)) {
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dev_err(&pdev->dev, "error: clk_get\n");
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gpmc_irq = 0;
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return PTR_ERR(gpmc_l3_clk);
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}
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clk_prepare_enable(gpmc_l3_clk);
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gpmc_dev = &pdev->dev;
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l = gpmc_read_reg(GPMC_REVISION);
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printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
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/* Set smart idle mode and automatic L3 clock gating */
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l = gpmc_read_reg(GPMC_SYSCONFIG);
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l &= 0x03 << 3;
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l |= (0x02 << 3) | (1 << 0);
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gpmc_write_reg(GPMC_SYSCONFIG, l);
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if (GPMC_REVISION_MAJOR(l) > 0x4)
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gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS;
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dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
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GPMC_REVISION_MINOR(l));
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gpmc_mem_init();
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ret = gpmc_setup_irq(gpmc_irq);
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if (ret)
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pr_err("gpmc: irq-%d could not claim: err %d\n",
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gpmc_irq, ret);
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return ret;
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if (IS_ERR_VALUE(gpmc_setup_irq()))
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dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
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return 0;
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}
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static __exit int gpmc_remove(struct platform_device *pdev)
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{
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gpmc_free_irq();
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gpmc_mem_exit();
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gpmc_dev = NULL;
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return 0;
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}
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static struct platform_driver gpmc_driver = {
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.probe = gpmc_probe,
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.remove = __devexit_p(gpmc_remove),
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.driver = {
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.name = DEVICE_NAME,
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.owner = THIS_MODULE,
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},
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};
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static __init int gpmc_init(void)
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{
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return platform_driver_register(&gpmc_driver);
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}
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static __exit void gpmc_exit(void)
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{
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platform_driver_unregister(&gpmc_driver);
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}
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postcore_initcall(gpmc_init);
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module_exit(gpmc_exit);
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static int __init omap_gpmc_init(void)
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{
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