drm/radeon/ci: disable needless sclk changes
The current code always reprogrammed the sclk levels, but we don't currently handle disp sclk requirements so just skip it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
7f6233ca87
commit
d967be9b80
@ -3809,7 +3809,7 @@ static void ci_find_dpm_states_clocks_in_dpm_table(struct radeon_device *rdev,
|
|||||||
pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;
|
pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;
|
||||||
} else {
|
} else {
|
||||||
/* XXX check display min clock requirements */
|
/* XXX check display min clock requirements */
|
||||||
if (0 != CISLAND_MINIMUM_ENGINE_CLOCK)
|
if (CISLAND_MINIMUM_ENGINE_CLOCK != CISLAND_MINIMUM_ENGINE_CLOCK)
|
||||||
pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_SCLK;
|
pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_SCLK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user