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ARM: dts: pxa: add clocks

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Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.

This patch ensures that :
 - the current description is correct
 - the clocks are actually claimed, so that clock framework doesn't
   disable them automatically (unused clocks shutdown)

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This commit is contained in:
Robert Jarzmik 2015-02-07 13:13:24 +01:00
parent f374d1e7ef
commit d96672e620
3 changed files with 40 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm/boot/dts/pxa27x.dtsi
View File

@ -1,6 +1,6 @@
/* The pxa3xx skeleton simply augments the 2xx version */ /* The pxa3xx skeleton simply augments the 2xx version */
#include "pxa2xx.dtsi" #include "pxa2xx.dtsi"
#include "dt-bindings/clock/pxa2xx-clock.h" #include "dt-bindings/clock/pxa-clock.h"
/ { / {
model = "Marvell PXA27x familiy SoC"; model = "Marvell PXA27x familiy SoC";
@ -12,36 +12,47 @@
marvell,intc-nr-irqs = <34>; marvell,intc-nr-irqs = <34>;
}; };
gpio: gpio@40e00000 {
compatible = "intel,pxa27x-gpio";
clocks = <&clks CLK_NONE>;
};
pwm0: pwm@40b00000 { pwm0: pwm@40b00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00000 0x10>; reg = <0x40b00000 0x10>;
#pwm-cells = <1>; #pwm-cells = <1>;
clocks = <&clks CLK_PWM0>;
}; };
pwm1: pwm@40b00010 { pwm1: pwm@40b00010 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00010 0x10>; reg = <0x40b00010 0x10>;
#pwm-cells = <1>; #pwm-cells = <1>;
clocks = <&clks CLK_PWM1>;
}; };
pwm2: pwm@40c00000 { pwm2: pwm@40c00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40c00000 0x10>; reg = <0x40c00000 0x10>;
#pwm-cells = <1>; #pwm-cells = <1>;
clocks = <&clks CLK_PWM0>;
}; };
pwm3: pwm@40c00010 { pwm3: pwm@40c00010 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40c00010 0x10>; reg = <0x40c00010 0x10>;
#pwm-cells = <1>; #pwm-cells = <1>;
clocks = <&clks CLK_PWM1>;
}; };
pwri2c: i2c@40f000180 { pwri2c: i2c@40f000180 {
compatible = "mrvl,pxa-i2c"; compatible = "mrvl,pxa-i2c";
reg = <0x40f00180 0x24>; reg = <0x40f00180 0x24>;
interrupts = <6>; interrupts = <6>;
clocks = <&clks CLK_PWRI2C>;
status = "disabled"; status = "disabled";
}; };
}; };
clocks { clocks {
@ -53,11 +64,10 @@
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
pxa2xx_clks: pxa2xx_clks@41300004 { clks: pxa2xx_clks@41300004 {
compatible = "marvell,pxa-clocks"; compatible = "marvell,pxa270-clocks";
#clock-cells = <1>; #clock-cells = <1>;
status = "okay"; status = "okay";
}; };
}; };
}; };

7
arch/arm/boot/dts/pxa2xx.dtsi
View File

@ -6,7 +6,8 @@
* Licensed under GPLv2 or later. * Licensed under GPLv2 or later.
*/ */
/include/ "skeleton.dtsi" #include "skeleton.dtsi"
#include "dt-bindings/clock/pxa-clock.h"
/ { / {
model = "Marvell PXA2xx family SoC"; model = "Marvell PXA2xx family SoC";
@ -79,6 +80,7 @@
compatible = "mrvl,pxa-uart"; compatible = "mrvl,pxa-uart";
reg = <0x40100000 0x30>; reg = <0x40100000 0x30>;
interrupts = <22>; interrupts = <22>;
clocks = <&clks CLK_FFUART>;
status = "disabled"; status = "disabled";
}; };
@ -86,6 +88,7 @@
compatible = "mrvl,pxa-uart"; compatible = "mrvl,pxa-uart";
reg = <0x40200000 0x30>; reg = <0x40200000 0x30>;
interrupts = <21>; interrupts = <21>;
clocks = <&clks CLK_BTUART>;
status = "disabled"; status = "disabled";
}; };
@ -93,6 +96,7 @@
compatible = "mrvl,pxa-uart"; compatible = "mrvl,pxa-uart";
reg = <0x40700000 0x30>; reg = <0x40700000 0x30>;
interrupts = <20>; interrupts = <20>;
clocks = <&clks CLK_STUART>;
status = "disabled"; status = "disabled";
}; };
@ -107,6 +111,7 @@
compatible = "mrvl,pxa-i2c"; compatible = "mrvl,pxa-i2c";
reg = <0x40301680 0x30>; reg = <0x40301680 0x30>;
interrupts = <18>; interrupts = <18>;
clocks = <&clks CLK_I2C>;
#address-cells = <0x1>; #address-cells = <0x1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";

21
arch/arm/boot/dts/pxa3xx.dtsi
View File

@ -1,5 +1,5 @@
/* The pxa3xx skeleton simply augments the 2xx version */ /* The pxa3xx skeleton simply augments the 2xx version */
/include/ "pxa2xx.dtsi" #include "pxa2xx.dtsi"
/ { / {
model = "Marvell PXA3xx familiy SoC"; model = "Marvell PXA3xx familiy SoC";
@ -10,6 +10,7 @@
compatible = "mrvl,pwri2c"; compatible = "mrvl,pwri2c";
reg = <0x40f500c0 0x30>; reg = <0x40f500c0 0x30>;
interrupts = <6>; interrupts = <6>;
clocks = <&clks CLK_PWRI2C>;
#address-cells = <0x1>; #address-cells = <0x1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
@ -19,6 +20,7 @@
compatible = "marvell,pxa3xx-nand"; compatible = "marvell,pxa3xx-nand";
reg = <0x43100000 90>; reg = <0x43100000 90>;
interrupts = <45>; interrupts = <45>;
clocks = <&clks CLK_NAND>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
status = "disabled"; status = "disabled";
@ -32,6 +34,7 @@
gpio: gpio@40e00000 { gpio: gpio@40e00000 {
compatible = "intel,pxa3xx-gpio"; compatible = "intel,pxa3xx-gpio";
reg = <0x40e00000 0x10000>; reg = <0x40e00000 0x10000>;
clocks = <&clks CLK_GPIO>;
interrupt-names = "gpio0", "gpio1", "gpio_mux"; interrupt-names = "gpio0", "gpio1", "gpio_mux";
interrupts = <8 9 10>; interrupts = <8 9 10>;
gpio-controller; gpio-controller;
@ -40,4 +43,20 @@
#interrupt-cells = <0x2>; #interrupt-cells = <0x2>;
}; };
}; };
clocks {
/*
* The muxing of external clocks/internal dividers for osc* clock
* sources has been hidden under the carpet by now.
*/
#address-cells = <1>;
#size-cells = <1>;
ranges;
clks: pxa3xx_clks@41300004 {
compatible = "marvell,pxa300-clocks";
#clock-cells = <1>;
status = "okay";
};
};
}; };