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drm/i915/guc: Unify parameters of public CT functions

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There is no need to mix parameter types in public CT functions
as we can always accept intel_guc_ct.

v2: fix 'Return' doc, s/dev_priv/i915 (Sagar)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320162020.38672-1-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko 2018-03-20 16:20:20 +00:00 committed by Chris Wilson
parent e9c7e65179
commit d871bfd008
3 changed files with 31 additions and 20 deletions
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41
drivers/gpu/drm/i915/intel_guc_ct.c
View File

@ -28,12 +28,21 @@ enum { CTB_SEND = 0, CTB_RECV = 1 };
enum { CTB_OWNER_HOST = 0 };
/**
* intel_guc_ct_init_early - Initialize CT state without requiring device access
* @ct: pointer to CT struct
*/
void intel_guc_ct_init_early(struct intel_guc_ct *ct)
{
/* we're using static channel owners */
ct->host_channel.owner = CTB_OWNER_HOST;
}
static inline struct intel_guc *ct_to_guc(struct intel_guc_ct *ct)
{
return container_of(ct, struct intel_guc, ct);
}
static inline const char *guc_ct_buffer_type_to_str(u32 type)
{
switch (type) {
@ -416,19 +425,21 @@ static int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len)
}
/**
* Enable buffer based command transport
* intel_guc_ct_enable - Enable buffer based command transport.
* @ct: pointer to CT struct
*
* Shall only be called for platforms with HAS_GUC_CT.
* @guc: the guc
* return: 0 on success
* non-zero on failure
*
* Return: 0 on success, a negative errno code on failure.
*/
int intel_guc_enable_ct(struct intel_guc *guc)
int intel_guc_ct_enable(struct intel_guc_ct *ct)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
struct intel_guc_ct_channel *ctch = &guc->ct.host_channel;
struct intel_guc *guc = ct_to_guc(ct);
struct drm_i915_private *i915 = guc_to_i915(guc);
struct intel_guc_ct_channel *ctch = &ct->host_channel;
int err;
GEM_BUG_ON(!HAS_GUC_CT(dev_priv));
GEM_BUG_ON(!HAS_GUC_CT(i915));
err = ctch_open(guc, ctch);
if (unlikely(err))
@ -441,16 +452,18 @@ int intel_guc_enable_ct(struct intel_guc *guc)
}
/**
* Disable buffer based command transport.
* intel_guc_ct_disable - Disable buffer based command transport.
* @ct: pointer to CT struct
*
* Shall only be called for platforms with HAS_GUC_CT.
* @guc: the guc
*/
void intel_guc_disable_ct(struct intel_guc *guc)
void intel_guc_ct_disable(struct intel_guc_ct *ct)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
struct intel_guc_ct_channel *ctch = &guc->ct.host_channel;
struct intel_guc *guc = ct_to_guc(ct);
struct drm_i915_private *i915 = guc_to_i915(guc);
struct intel_guc_ct_channel *ctch = &ct->host_channel;
GEM_BUG_ON(!HAS_GUC_CT(dev_priv));
GEM_BUG_ON(!HAS_GUC_CT(i915));
if (!ctch_is_open(ctch))
return;

6
drivers/gpu/drm/i915/intel_guc_ct.h
View File

@ -78,9 +78,7 @@ struct intel_guc_ct {
};
void intel_guc_ct_init_early(struct intel_guc_ct *ct);
/* XXX: move to intel_uc.h ? don't fit there either */
int intel_guc_enable_ct(struct intel_guc *guc);
void intel_guc_disable_ct(struct intel_guc *guc);
int intel_guc_ct_enable(struct intel_guc_ct *ct);
void intel_guc_ct_disable(struct intel_guc_ct *ct);
#endif /* _INTEL_GUC_CT_H_ */

4
drivers/gpu/drm/i915/intel_uc.c
View File

@ -231,7 +231,7 @@ static int guc_enable_communication(struct intel_guc *guc)
gen9_enable_guc_interrupts(dev_priv);
if (HAS_GUC_CT(dev_priv))
return intel_guc_enable_ct(guc);
return intel_guc_ct_enable(&guc->ct);
guc->send = intel_guc_send_mmio;
return 0;
@ -242,7 +242,7 @@ static void guc_disable_communication(struct intel_guc *guc)
struct drm_i915_private *dev_priv = guc_to_i915(guc);
if (HAS_GUC_CT(dev_priv))
intel_guc_disable_ct(guc);
intel_guc_ct_disable(&guc->ct);
gen9_disable_guc_interrupts(dev_priv);