forked from Minki/linux
IB/mthca: Convert to use ib_modify_qp_is_ok()
Use ib_modify_qp_is_ok() in mthca, and delete the big table of attributes for queue pair state transitions. Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
parent
8a51866f08
commit
d844183d9c
@ -1566,31 +1566,56 @@ int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status)
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CMD_TIME_CLASS_B, status);
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}
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int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
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int is_ee, struct mthca_mailbox *mailbox, u32 optmask,
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int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur,
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enum ib_qp_state next, u32 num, int is_ee,
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struct mthca_mailbox *mailbox, u32 optmask,
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u8 *status)
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{
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static const u16 op[] = {
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[MTHCA_TRANS_RST2INIT] = CMD_RST2INIT_QPEE,
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[MTHCA_TRANS_INIT2INIT] = CMD_INIT2INIT_QPEE,
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[MTHCA_TRANS_INIT2RTR] = CMD_INIT2RTR_QPEE,
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[MTHCA_TRANS_RTR2RTS] = CMD_RTR2RTS_QPEE,
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[MTHCA_TRANS_RTS2RTS] = CMD_RTS2RTS_QPEE,
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[MTHCA_TRANS_SQERR2RTS] = CMD_SQERR2RTS_QPEE,
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[MTHCA_TRANS_ANY2ERR] = CMD_2ERR_QPEE,
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[MTHCA_TRANS_RTS2SQD] = CMD_RTS2SQD_QPEE,
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[MTHCA_TRANS_SQD2SQD] = CMD_SQD2SQD_QPEE,
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[MTHCA_TRANS_SQD2RTS] = CMD_SQD2RTS_QPEE,
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[MTHCA_TRANS_ANY2RST] = CMD_ERR2RST_QPEE
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static const u16 op[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
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[IB_QPS_RESET] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_INIT] = CMD_RST2INIT_QPEE,
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},
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[IB_QPS_INIT] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_INIT] = CMD_INIT2INIT_QPEE,
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[IB_QPS_RTR] = CMD_INIT2RTR_QPEE,
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},
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[IB_QPS_RTR] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_RTS] = CMD_RTR2RTS_QPEE,
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},
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[IB_QPS_RTS] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_RTS] = CMD_RTS2RTS_QPEE,
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[IB_QPS_SQD] = CMD_RTS2SQD_QPEE,
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},
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[IB_QPS_SQD] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_RTS] = CMD_SQD2RTS_QPEE,
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[IB_QPS_SQD] = CMD_SQD2SQD_QPEE,
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},
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[IB_QPS_SQE] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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[IB_QPS_RTS] = CMD_SQERR2RTS_QPEE,
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},
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[IB_QPS_ERR] = {
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[IB_QPS_RESET] = CMD_ERR2RST_QPEE,
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[IB_QPS_ERR] = CMD_2ERR_QPEE,
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}
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};
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u8 op_mod = 0;
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int my_mailbox = 0;
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int err;
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if (trans < 0 || trans >= ARRAY_SIZE(op))
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return -EINVAL;
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if (trans == MTHCA_TRANS_ANY2RST) {
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if (op[cur][next] == CMD_ERR2RST_QPEE) {
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op_mod = 3; /* don't write outbox, any->reset */
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/* For debugging */
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@ -1602,26 +1627,10 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
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} else
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mailbox = NULL;
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}
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} else {
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if (0) {
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int i;
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mthca_dbg(dev, "Dumping QP context:\n");
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printk(" opt param mask: %08x\n", be32_to_cpup(mailbox->buf));
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for (i = 0; i < 0x100 / 4; ++i) {
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if (i % 8 == 0)
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printk(" [%02x] ", i * 4);
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printk(" %08x",
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be32_to_cpu(((__be32 *) mailbox->buf)[i + 2]));
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if ((i + 1) % 8 == 0)
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printk("\n");
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}
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}
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}
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if (trans == MTHCA_TRANS_ANY2RST) {
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err = mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0,
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(!!is_ee << 24) | num, op_mod,
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op[trans], CMD_TIME_CLASS_C, status);
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op[cur][next], CMD_TIME_CLASS_C, status);
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if (0 && mailbox) {
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int i;
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@ -1637,13 +1646,26 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
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}
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}
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} else
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err = mthca_cmd(dev, mailbox->dma,
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optmask | (!!is_ee << 24) | num,
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op_mod, op[trans], CMD_TIME_CLASS_C, status);
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if (my_mailbox)
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mthca_free_mailbox(dev, mailbox);
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} else {
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if (0) {
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int i;
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mthca_dbg(dev, "Dumping QP context:\n");
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printk(" opt param mask: %08x\n", be32_to_cpup(mailbox->buf));
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for (i = 0; i < 0x100 / 4; ++i) {
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if (i % 8 == 0)
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printk(" [%02x] ", i * 4);
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printk(" %08x",
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be32_to_cpu(((__be32 *) mailbox->buf)[i + 2]));
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if ((i + 1) % 8 == 0)
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printk("\n");
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}
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}
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err = mthca_cmd(dev, mailbox->dma, optmask | (!!is_ee << 24) | num,
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op_mod, op[cur][next], CMD_TIME_CLASS_C, status);
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}
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return err;
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}
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@ -306,8 +306,9 @@ int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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int srq_num, u8 *status);
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int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status);
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int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
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int is_ee, struct mthca_mailbox *mailbox, u32 optmask,
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int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur,
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enum ib_qp_state next, u32 num, int is_ee,
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struct mthca_mailbox *mailbox, u32 optmask,
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u8 *status);
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int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee,
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struct mthca_mailbox *mailbox, u8 *status);
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@ -286,213 +286,6 @@ static int to_mthca_st(int transport)
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}
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}
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static const struct {
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int trans;
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u32 req_param[NUM_TRANS];
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u32 opt_param[NUM_TRANS];
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} state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
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[IB_QPS_RESET] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_INIT] = {
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.trans = MTHCA_TRANS_RST2INIT,
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.req_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_QKEY),
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[UC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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[RC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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[MLX] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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},
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/* bug-for-bug compatibility with VAPI: */
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.opt_param = {
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[MLX] = IB_QP_PORT
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}
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},
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},
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[IB_QPS_INIT] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_INIT] = {
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.trans = MTHCA_TRANS_INIT2INIT,
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.opt_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_QKEY),
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[UC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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[RC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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[MLX] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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}
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},
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[IB_QPS_RTR] = {
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.trans = MTHCA_TRANS_INIT2RTR,
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.req_param = {
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[UC] = (IB_QP_AV |
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IB_QP_PATH_MTU |
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IB_QP_DEST_QPN |
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IB_QP_RQ_PSN),
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[RC] = (IB_QP_AV |
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IB_QP_PATH_MTU |
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IB_QP_DEST_QPN |
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IB_QP_RQ_PSN |
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IB_QP_MAX_DEST_RD_ATOMIC |
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IB_QP_MIN_RNR_TIMER),
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},
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.opt_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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[UC] = (IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PKEY_INDEX),
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[RC] = (IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PKEY_INDEX),
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[MLX] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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}
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}
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},
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[IB_QPS_RTR] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_RTS] = {
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.trans = MTHCA_TRANS_RTR2RTS,
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.req_param = {
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[UD] = IB_QP_SQ_PSN,
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[UC] = IB_QP_SQ_PSN,
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[RC] = (IB_QP_TIMEOUT |
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IB_QP_RETRY_CNT |
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IB_QP_RNR_RETRY |
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IB_QP_SQ_PSN |
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IB_QP_MAX_QP_RD_ATOMIC),
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[MLX] = IB_QP_SQ_PSN,
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},
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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[UC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_MIN_RNR_TIMER |
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IB_QP_PATH_MIG_STATE),
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[MLX] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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}
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}
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},
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[IB_QPS_RTS] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_RTS] = {
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.trans = MTHCA_TRANS_RTS2RTS,
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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[UC] = (IB_QP_ACCESS_FLAGS |
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IB_QP_ALT_PATH |
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IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_ACCESS_FLAGS |
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IB_QP_ALT_PATH |
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IB_QP_PATH_MIG_STATE |
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IB_QP_MIN_RNR_TIMER),
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[MLX] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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}
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},
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[IB_QPS_SQD] = {
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.trans = MTHCA_TRANS_RTS2SQD,
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.opt_param = {
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[UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
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[UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
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[RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
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[MLX] = IB_QP_EN_SQD_ASYNC_NOTIFY
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}
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},
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},
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[IB_QPS_SQD] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_RTS] = {
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.trans = MTHCA_TRANS_SQD2RTS,
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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[UC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_MIN_RNR_TIMER |
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IB_QP_PATH_MIG_STATE),
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[MLX] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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}
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},
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[IB_QPS_SQD] = {
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.trans = MTHCA_TRANS_SQD2SQD,
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.opt_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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[UC] = (IB_QP_AV |
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IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PKEY_INDEX |
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IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_AV |
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IB_QP_TIMEOUT |
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IB_QP_RETRY_CNT |
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IB_QP_RNR_RETRY |
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IB_QP_MAX_QP_RD_ATOMIC |
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IB_QP_MAX_DEST_RD_ATOMIC |
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IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PKEY_INDEX |
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IB_QP_MIN_RNR_TIMER |
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IB_QP_PATH_MIG_STATE),
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[MLX] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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}
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}
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},
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[IB_QPS_SQE] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR },
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[IB_QPS_RTS] = {
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.trans = MTHCA_TRANS_SQERR2RTS,
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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[UC] = (IB_QP_CUR_STATE |
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IB_QP_ACCESS_FLAGS),
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[MLX] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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}
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}
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},
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[IB_QPS_ERR] = {
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[IB_QPS_RESET] = { .trans = MTHCA_TRANS_ANY2RST },
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[IB_QPS_ERR] = { .trans = MTHCA_TRANS_ANY2ERR }
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}
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};
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static void store_attrs(struct mthca_sqp *sqp, struct ib_qp_attr *attr,
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int attr_mask)
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{
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@ -582,18 +375,11 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
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struct mthca_mailbox *mailbox;
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struct mthca_qp_param *qp_param;
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struct mthca_qp_context *qp_context;
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u32 req_param, opt_param;
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u32 sqd_event = 0;
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u8 status;
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int err;
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if (attr_mask & IB_QP_CUR_STATE) {
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if (attr->cur_qp_state != IB_QPS_RTR &&
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attr->cur_qp_state != IB_QPS_RTS &&
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attr->cur_qp_state != IB_QPS_SQD &&
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attr->cur_qp_state != IB_QPS_SQE)
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return -EINVAL;
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else
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cur_state = attr->cur_qp_state;
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} else {
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spin_lock_irq(&qp->sq.lock);
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@ -603,37 +389,13 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
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spin_unlock_irq(&qp->sq.lock);
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}
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if (attr_mask & IB_QP_STATE) {
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if (attr->qp_state < 0 || attr->qp_state > IB_QPS_ERR)
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return -EINVAL;
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new_state = attr->qp_state;
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} else
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new_state = cur_state;
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new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
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if (state_table[cur_state][new_state].trans == MTHCA_TRANS_INVALID) {
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mthca_dbg(dev, "Illegal QP transition "
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"%d->%d\n", cur_state, new_state);
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return -EINVAL;
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}
|
||||
|
||||
req_param = state_table[cur_state][new_state].req_param[qp->transport];
|
||||
opt_param = state_table[cur_state][new_state].opt_param[qp->transport];
|
||||
|
||||
if ((req_param & attr_mask) != req_param) {
|
||||
mthca_dbg(dev, "QP transition "
|
||||
"%d->%d missing req attr 0x%08x\n",
|
||||
cur_state, new_state,
|
||||
req_param & ~attr_mask);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (attr_mask & ~(req_param | opt_param | IB_QP_STATE)) {
|
||||
mthca_dbg(dev, "QP transition (transport %d) "
|
||||
"%d->%d has extra attr 0x%08x\n",
|
||||
qp->transport,
|
||||
cur_state, new_state,
|
||||
attr_mask & ~(req_param | opt_param |
|
||||
IB_QP_STATE));
|
||||
if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type, attr_mask)) {
|
||||
mthca_dbg(dev, "Bad QP transition (transport %d) "
|
||||
"%d->%d with attr 0x%08x\n",
|
||||
qp->transport, cur_state, new_state,
|
||||
attr_mask);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -853,11 +615,11 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
|
||||
attr->en_sqd_async_notify)
|
||||
sqd_event = 1 << 31;
|
||||
|
||||
err = mthca_MODIFY_QP(dev, state_table[cur_state][new_state].trans,
|
||||
qp->qpn, 0, mailbox, sqd_event, &status);
|
||||
err = mthca_MODIFY_QP(dev, cur_state, new_state, qp->qpn, 0,
|
||||
mailbox, sqd_event, &status);
|
||||
if (status) {
|
||||
mthca_warn(dev, "modify QP %d returned status %02x.\n",
|
||||
state_table[cur_state][new_state].trans, status);
|
||||
mthca_warn(dev, "modify QP %d->%d returned status %02x.\n",
|
||||
cur_state, new_state, status);
|
||||
err = -EINVAL;
|
||||
}
|
||||
|
||||
@ -1405,7 +1167,8 @@ void mthca_free_qp(struct mthca_dev *dev,
|
||||
wait_event(qp->wait, !atomic_read(&qp->refcount));
|
||||
|
||||
if (qp->state != IB_QPS_RESET)
|
||||
mthca_MODIFY_QP(dev, MTHCA_TRANS_ANY2RST, qp->qpn, 0, NULL, 0, &status);
|
||||
mthca_MODIFY_QP(dev, qp->state, IB_QPS_RESET, qp->qpn, 0,
|
||||
NULL, 0, &status);
|
||||
|
||||
/*
|
||||
* If this is a userspace QP, the buffers, MR, CQs and so on
|
||||
|
Loading…
Reference in New Issue
Block a user