PCI: tango: Add MSI controller support
Add support for the MSI controller in Tango, which supports 256 message-signaled interrupts and a single doorbell address. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Marc Gonzalez
Bjorn Helgaas
parent
1e61a57cac
commit
d76bdce394
@ -1,12 +1,172 @@
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/pci-ecam.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/msi.h>
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#include <linux/of_address.h>
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#define MSI_MAX 256
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#define SMP8759_MUX 0x48
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#define SMP8759_TEST_OUT 0x74
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#define SMP8759_DOORBELL 0x7c
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#define SMP8759_STATUS 0x80
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#define SMP8759_ENABLE 0xa0
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struct tango_pcie {
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void __iomem *base;
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DECLARE_BITMAP(used_msi, MSI_MAX);
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u64 msi_doorbell;
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spinlock_t used_msi_lock;
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void __iomem *base;
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struct irq_domain *dom;
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};
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static void tango_msi_isr(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct tango_pcie *pcie = irq_desc_get_handler_data(desc);
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unsigned long status, base, virq, idx, pos = 0;
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chained_irq_enter(chip, desc);
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spin_lock(&pcie->used_msi_lock);
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while ((pos = find_next_bit(pcie->used_msi, MSI_MAX, pos)) < MSI_MAX) {
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base = round_down(pos, 32);
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status = readl_relaxed(pcie->base + SMP8759_STATUS + base / 8);
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for_each_set_bit(idx, &status, 32) {
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virq = irq_find_mapping(pcie->dom, base + idx);
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generic_handle_irq(virq);
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}
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pos = base + 32;
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}
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spin_unlock(&pcie->used_msi_lock);
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chained_irq_exit(chip, desc);
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}
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static void tango_ack(struct irq_data *d)
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{
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struct tango_pcie *pcie = d->chip_data;
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u32 offset = (d->hwirq / 32) * 4;
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u32 bit = BIT(d->hwirq % 32);
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writel_relaxed(bit, pcie->base + SMP8759_STATUS + offset);
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}
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static void update_msi_enable(struct irq_data *d, bool unmask)
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{
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unsigned long flags;
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struct tango_pcie *pcie = d->chip_data;
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u32 offset = (d->hwirq / 32) * 4;
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u32 bit = BIT(d->hwirq % 32);
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u32 val;
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spin_lock_irqsave(&pcie->used_msi_lock, flags);
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val = readl_relaxed(pcie->base + SMP8759_ENABLE + offset);
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val = unmask ? val | bit : val & ~bit;
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writel_relaxed(val, pcie->base + SMP8759_ENABLE + offset);
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spin_unlock_irqrestore(&pcie->used_msi_lock, flags);
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}
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static void tango_mask(struct irq_data *d)
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{
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update_msi_enable(d, false);
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}
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static void tango_unmask(struct irq_data *d)
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{
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update_msi_enable(d, true);
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}
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static int tango_set_affinity(struct irq_data *d, const struct cpumask *mask,
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bool force)
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{
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return -EINVAL;
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}
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static void tango_compose_msi_msg(struct irq_data *d, struct msi_msg *msg)
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{
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struct tango_pcie *pcie = d->chip_data;
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msg->address_lo = lower_32_bits(pcie->msi_doorbell);
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msg->address_hi = upper_32_bits(pcie->msi_doorbell);
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msg->data = d->hwirq;
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}
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static struct irq_chip tango_chip = {
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.irq_ack = tango_ack,
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.irq_mask = tango_mask,
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.irq_unmask = tango_unmask,
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.irq_set_affinity = tango_set_affinity,
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.irq_compose_msi_msg = tango_compose_msi_msg,
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};
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static void msi_ack(struct irq_data *d)
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{
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irq_chip_ack_parent(d);
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}
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static void msi_mask(struct irq_data *d)
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{
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pci_msi_mask_irq(d);
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irq_chip_mask_parent(d);
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}
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static void msi_unmask(struct irq_data *d)
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{
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pci_msi_unmask_irq(d);
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irq_chip_unmask_parent(d);
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}
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static struct irq_chip msi_chip = {
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.name = "MSI",
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.irq_ack = msi_ack,
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.irq_mask = msi_mask,
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.irq_unmask = msi_unmask,
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};
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static struct msi_domain_info msi_dom_info = {
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.flags = MSI_FLAG_PCI_MSIX
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| MSI_FLAG_USE_DEF_DOM_OPS
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| MSI_FLAG_USE_DEF_CHIP_OPS,
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.chip = &msi_chip,
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};
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static int tango_irq_domain_alloc(struct irq_domain *dom, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct tango_pcie *pcie = dom->host_data;
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unsigned long flags;
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int pos;
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spin_lock_irqsave(&pcie->used_msi_lock, flags);
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pos = find_first_zero_bit(pcie->used_msi, MSI_MAX);
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if (pos >= MSI_MAX) {
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spin_unlock_irqrestore(&pcie->used_msi_lock, flags);
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return -ENOSPC;
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}
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__set_bit(pos, pcie->used_msi);
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spin_unlock_irqrestore(&pcie->used_msi_lock, flags);
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irq_domain_set_info(dom, virq, pos, &tango_chip,
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pcie, handle_edge_irq, NULL, NULL);
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return 0;
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}
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static void tango_irq_domain_free(struct irq_domain *dom, unsigned int virq,
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unsigned int nr_irqs)
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{
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unsigned long flags;
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struct irq_data *d = irq_domain_get_irq_data(dom, virq);
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struct tango_pcie *pcie = d->chip_data;
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spin_lock_irqsave(&pcie->used_msi_lock, flags);
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__clear_bit(d->hwirq, pcie->used_msi);
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spin_unlock_irqrestore(&pcie->used_msi_lock, flags);
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}
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static const struct irq_domain_ops dom_ops = {
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.alloc = tango_irq_domain_alloc,
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.free = tango_irq_domain_free,
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};
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static int smp8759_config_read(struct pci_bus *bus, unsigned int devfn,
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@ -76,7 +236,11 @@ static int tango_pcie_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct tango_pcie *pcie;
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struct resource *res;
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int ret;
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struct fwnode_handle *fwnode = of_node_to_fwnode(dev->of_node);
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struct irq_domain *msi_dom, *irq_dom;
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struct of_pci_range_parser parser;
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struct of_pci_range range;
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int virq, offset;
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dev_warn(dev, "simultaneous PCI config and MMIO accesses may cause data corruption\n");
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add_taint(TAINT_CRAP, LOCKDEP_STILL_OK);
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@ -95,6 +259,41 @@ static int tango_pcie_probe(struct platform_device *pdev)
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if (!tango_pcie_link_up(pcie))
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return -ENODEV;
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if (of_pci_dma_range_parser_init(&parser, dev->of_node) < 0)
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return -ENOENT;
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if (of_pci_range_parser_one(&parser, &range) == NULL)
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return -ENOENT;
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range.pci_addr += range.size;
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pcie->msi_doorbell = range.pci_addr + res->start + SMP8759_DOORBELL;
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for (offset = 0; offset < MSI_MAX / 8; offset += 4)
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writel_relaxed(0, pcie->base + SMP8759_ENABLE + offset);
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virq = platform_get_irq(pdev, 1);
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if (virq <= 0) {
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dev_err(dev, "Failed to map IRQ\n");
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return -ENXIO;
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}
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irq_dom = irq_domain_create_linear(fwnode, MSI_MAX, &dom_ops, pcie);
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if (!irq_dom) {
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dev_err(dev, "Failed to create IRQ domain\n");
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return -ENOMEM;
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}
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msi_dom = pci_msi_create_irq_domain(fwnode, &msi_dom_info, irq_dom);
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if (!msi_dom) {
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dev_err(dev, "Failed to create MSI domain\n");
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irq_domain_remove(irq_dom);
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return -ENOMEM;
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}
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pcie->dom = irq_dom;
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spin_lock_init(&pcie->used_msi_lock);
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irq_set_chained_handler_and_data(virq, tango_msi_isr, pcie);
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return pci_host_common_probe(pdev, &smp8759_ecam_ops);
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}
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