forked from Minki/linux
usb: musb: Start using struct usb_otg
Use struct usb_otg members with OTG specific functions instead of usb_phy members. [ balbi@ti.com: added a missing change on musb_gadget.c to avoid a compile error on a later patch ] Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
parent
76eb57ec1b
commit
d445b6da8d
@ -226,6 +226,7 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
|
||||
struct device *dev = musb->controller;
|
||||
struct musb_hdrc_platform_data *plat = dev->platform_data;
|
||||
struct omap_musb_board_data *data = plat->board_data;
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
unsigned long flags;
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
u32 epintr, usbintr;
|
||||
@ -289,14 +290,14 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
|
||||
WARNING("VBUS error workaround (delay coming)\n");
|
||||
} else if (is_host_enabled(musb) && drvvbus) {
|
||||
MUSB_HST_MODE(musb);
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||
portstate(musb->port1_status |= USB_PORT_STAT_POWER);
|
||||
del_timer(&otg_workaround);
|
||||
} else {
|
||||
musb->is_active = 0;
|
||||
MUSB_DEV_MODE(musb);
|
||||
musb->xceiv->default_a = 0;
|
||||
otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
|
||||
}
|
||||
|
@ -294,6 +294,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
|
||||
{
|
||||
struct musb *musb = hci;
|
||||
void __iomem *reg_base = musb->ctrl_base;
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
unsigned long flags;
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
u32 status;
|
||||
@ -351,14 +352,14 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
|
||||
WARNING("VBUS error workaround (delay coming)\n");
|
||||
} else if (is_host_enabled(musb) && drvvbus) {
|
||||
MUSB_HST_MODE(musb);
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||
portstate(musb->port1_status |= USB_PORT_STAT_POWER);
|
||||
del_timer(&otg_workaround);
|
||||
} else {
|
||||
musb->is_active = 0;
|
||||
MUSB_DEV_MODE(musb);
|
||||
musb->xceiv->default_a = 0;
|
||||
otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
|
||||
}
|
||||
|
@ -265,6 +265,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
||||
unsigned long flags;
|
||||
irqreturn_t retval = IRQ_NONE;
|
||||
struct musb *musb = __hci;
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
void __iomem *tibase = musb->ctrl_base;
|
||||
struct cppi *cppi;
|
||||
u32 tmp;
|
||||
@ -331,14 +332,14 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
||||
WARNING("VBUS error workaround (delay coming)\n");
|
||||
} else if (is_host_enabled(musb) && drvvbus) {
|
||||
MUSB_HST_MODE(musb);
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||
portstate(musb->port1_status |= USB_PORT_STAT_POWER);
|
||||
del_timer(&otg_workaround);
|
||||
} else {
|
||||
musb->is_active = 0;
|
||||
MUSB_DEV_MODE(musb);
|
||||
musb->xceiv->default_a = 0;
|
||||
otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
|
||||
}
|
||||
@ -464,7 +465,7 @@ static int davinci_musb_exit(struct musb *musb)
|
||||
davinci_musb_source_power(musb, 0 /*off*/, 1);
|
||||
|
||||
/* delay, to avoid problems with module reload */
|
||||
if (is_host_enabled(musb) && musb->xceiv->default_a) {
|
||||
if (is_host_enabled(musb) && musb->xceiv->otg->default_a) {
|
||||
int maxdelay = 30;
|
||||
u8 devctl, warn = 0;
|
||||
|
||||
|
@ -414,6 +414,7 @@ void musb_hnp_stop(struct musb *musb)
|
||||
static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
||||
u8 devctl, u8 power)
|
||||
{
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
irqreturn_t handled = IRQ_NONE;
|
||||
|
||||
dev_dbg(musb->controller, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl,
|
||||
@ -626,7 +627,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
||||
case OTG_STATE_B_PERIPHERAL:
|
||||
musb_g_suspend(musb);
|
||||
musb->is_active = is_otg_enabled(musb)
|
||||
&& musb->xceiv->gadget->b_hnp_enable;
|
||||
&& otg->gadget->b_hnp_enable;
|
||||
if (musb->is_active) {
|
||||
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
||||
dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
|
||||
@ -643,7 +644,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
||||
case OTG_STATE_A_HOST:
|
||||
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
||||
musb->is_active = is_otg_enabled(musb)
|
||||
&& musb->xceiv->host->b_hnp_enable;
|
||||
&& otg->host->b_hnp_enable;
|
||||
break;
|
||||
case OTG_STATE_B_HOST:
|
||||
/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
|
||||
@ -1965,7 +1966,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
||||
|
||||
if (is_otg_enabled(musb))
|
||||
hcd->self.otg_port = 1;
|
||||
musb->xceiv->host = &hcd->self;
|
||||
musb->xceiv->otg->host = &hcd->self;
|
||||
hcd->power_budget = 2 * (plat->power ? : 250);
|
||||
|
||||
/* program PHY to use external vBus if required */
|
||||
@ -1984,7 +1985,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
||||
struct usb_hcd *hcd = musb_to_hcd(musb);
|
||||
|
||||
MUSB_HST_MODE(musb);
|
||||
musb->xceiv->default_a = 1;
|
||||
musb->xceiv->otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_IDLE;
|
||||
|
||||
status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
|
||||
@ -1999,7 +2000,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
||||
|
||||
} else /* peripheral is enabled */ {
|
||||
MUSB_DEV_MODE(musb);
|
||||
musb->xceiv->default_a = 0;
|
||||
musb->xceiv->otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
|
||||
status = musb_gadget_setup(musb);
|
||||
|
@ -1898,6 +1898,7 @@ static int musb_gadget_start(struct usb_gadget *g,
|
||||
struct usb_gadget_driver *driver)
|
||||
{
|
||||
struct musb *musb = gadget_to_musb(g);
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
unsigned long flags;
|
||||
int retval = -EINVAL;
|
||||
|
||||
@ -1945,7 +1946,7 @@ static int musb_gadget_start(struct usb_gadget *g,
|
||||
}
|
||||
|
||||
if ((musb->xceiv->last_event == USB_EVENT_ID)
|
||||
&& musb->xceiv->set_vbus)
|
||||
&& otg->set_vbus)
|
||||
otg_set_vbus(musb->xceiv, 1);
|
||||
|
||||
hcd->self.uses_pio_for_control = 1;
|
||||
|
@ -47,6 +47,7 @@
|
||||
|
||||
static void musb_port_suspend(struct musb *musb, bool do_suspend)
|
||||
{
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
u8 power;
|
||||
void __iomem *mbase = musb->mregs;
|
||||
|
||||
@ -81,7 +82,7 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
|
||||
case OTG_STATE_A_HOST:
|
||||
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
||||
musb->is_active = is_otg_enabled(musb)
|
||||
&& musb->xceiv->host->b_hnp_enable;
|
||||
&& otg->host->b_hnp_enable;
|
||||
if (musb->is_active)
|
||||
mod_timer(&musb->otg_timer, jiffies
|
||||
+ msecs_to_jiffies(
|
||||
@ -91,7 +92,7 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
|
||||
case OTG_STATE_B_HOST:
|
||||
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
||||
musb->is_active = is_otg_enabled(musb)
|
||||
&& musb->xceiv->host->b_hnp_enable;
|
||||
&& otg->host->b_hnp_enable;
|
||||
musb_platform_try_idle(musb, 0);
|
||||
break;
|
||||
default:
|
||||
@ -179,6 +180,8 @@ static void musb_port_reset(struct musb *musb, bool do_reset)
|
||||
|
||||
void musb_root_disconnect(struct musb *musb)
|
||||
{
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
|
||||
musb->port1_status = USB_PORT_STAT_POWER
|
||||
| (USB_PORT_STAT_C_CONNECTION << 16);
|
||||
|
||||
@ -188,7 +191,7 @@ void musb_root_disconnect(struct musb *musb)
|
||||
switch (musb->xceiv->state) {
|
||||
case OTG_STATE_A_SUSPEND:
|
||||
if (is_otg_enabled(musb)
|
||||
&& musb->xceiv->host->b_hnp_enable) {
|
||||
&& otg->host->b_hnp_enable) {
|
||||
musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
|
||||
musb->g.is_a_peripheral = 1;
|
||||
break;
|
||||
|
@ -132,6 +132,7 @@ static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
|
||||
|
||||
static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
|
||||
{
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
u8 devctl;
|
||||
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
|
||||
int ret = 1;
|
||||
@ -167,7 +168,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
|
||||
otg_set_vbus(musb->xceiv, 1);
|
||||
} else {
|
||||
musb->is_active = 1;
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||
devctl |= MUSB_DEVCTL_SESSION;
|
||||
MUSB_HST_MODE(musb);
|
||||
@ -179,7 +180,7 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
|
||||
* jumping right to B_IDLE...
|
||||
*/
|
||||
|
||||
musb->xceiv->default_a = 0;
|
||||
otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
devctl &= ~MUSB_DEVCTL_SESSION;
|
||||
|
||||
|
@ -293,7 +293,7 @@ static int tusb_draw_power(struct usb_phy *x, unsigned mA)
|
||||
* The actual current usage would be very board-specific. For now,
|
||||
* it's simpler to just use an aggregate (also board-specific).
|
||||
*/
|
||||
if (x->default_a || mA < (musb->min_power << 1))
|
||||
if (x->otg->default_a || mA < (musb->min_power << 1))
|
||||
mA = 0;
|
||||
|
||||
reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
|
||||
@ -510,6 +510,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
|
||||
void __iomem *tbase = musb->ctrl_base;
|
||||
u32 conf, prcm, timer;
|
||||
u8 devctl;
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
|
||||
/* HDRC controls CPEN, but beware current surges during device
|
||||
* connect. They can trigger transient overcurrent conditions
|
||||
@ -522,7 +523,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
|
||||
|
||||
if (is_on) {
|
||||
timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||
devctl |= MUSB_DEVCTL_SESSION;
|
||||
|
||||
@ -548,11 +549,11 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
|
||||
musb->xceiv->state = OTG_STATE_A_IDLE;
|
||||
}
|
||||
musb->is_active = 0;
|
||||
musb->xceiv->default_a = 1;
|
||||
otg->default_a = 1;
|
||||
MUSB_HST_MODE(musb);
|
||||
} else {
|
||||
musb->is_active = 0;
|
||||
musb->xceiv->default_a = 0;
|
||||
otg->default_a = 0;
|
||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||
MUSB_DEV_MODE(musb);
|
||||
}
|
||||
@ -644,6 +645,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
|
||||
{
|
||||
u32 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
|
||||
unsigned long idle_timeout = 0;
|
||||
struct usb_otg *otg = musb->xceiv->otg;
|
||||
|
||||
/* ID pin */
|
||||
if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) {
|
||||
@ -654,7 +656,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
|
||||
else
|
||||
default_a = is_host_enabled(musb);
|
||||
dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B');
|
||||
musb->xceiv->default_a = default_a;
|
||||
otg->default_a = default_a;
|
||||
tusb_musb_set_vbus(musb, default_a);
|
||||
|
||||
/* Don't allow idling immediately */
|
||||
@ -666,7 +668,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
|
||||
if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
|
||||
|
||||
/* B-dev state machine: no vbus ~= disconnect */
|
||||
if ((is_otg_enabled(musb) && !musb->xceiv->default_a)
|
||||
if ((is_otg_enabled(musb) && !otg->default_a)
|
||||
|| !is_host_enabled(musb)) {
|
||||
/* ? musb_root_disconnect(musb); */
|
||||
musb->port1_status &=
|
||||
|
Loading…
Reference in New Issue
Block a user