forked from Minki/linux
ath9k: Revamp TX aggregation
This patch cleans up the convoluted buffer management logic for TX aggregation. Both aggregation creation and completion are addressed. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Sujith
John W. Linville
parent
6ef9b13db2
commit
d43f301520
@ -187,7 +187,6 @@ struct ath_config {
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#define ATH_TXBUF_RESET(_bf) do { \
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(_bf)->bf_status = 0; \
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(_bf)->bf_lastbf = NULL; \
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(_bf)->bf_lastfrm = NULL; \
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(_bf)->bf_next = NULL; \
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memset(&((_bf)->bf_state), 0, \
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sizeof(struct ath_buf_state)); \
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@ -245,10 +244,8 @@ struct ath_buf_state {
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*/
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struct ath_buf {
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struct list_head list;
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struct list_head *last;
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struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
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an aggregate) */
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struct ath_buf *bf_lastfrm; /* last buf of this frame */
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struct ath_buf *bf_next; /* next subframe in the aggregate */
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void *bf_mpdu; /* enclosing frame structure */
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struct ath_desc *bf_desc; /* virtual addr of desc */
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@ -261,13 +258,7 @@ struct ath_buf {
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};
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#define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0)
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/* hw processing complete, desc processed by hal */
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#define ATH_BUFSTATUS_DONE 0x00000001
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/* hw processing complete, desc hold for hw */
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#define ATH_BUFSTATUS_STALE 0x00000002
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/* Rx-only: OS is done with this packet and it's ok to queued it to hw */
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#define ATH_BUFSTATUS_FREE 0x00000004
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/* DMA state for tx/rx descriptors */
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@ -360,7 +351,6 @@ struct ath_txq {
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u32 *axq_link; /* link ptr in last TX desc */
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struct list_head axq_q; /* transmit queue */
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spinlock_t axq_lock;
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unsigned long axq_lockflags; /* intr state when must cli */
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u32 axq_depth; /* queue depth */
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u8 axq_aggr_depth; /* aggregates queued */
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u32 axq_totalqueued; /* total ever queued */
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@ -151,7 +151,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
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while (!list_empty(&tid->buf_q)) {
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bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
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ASSERT(!bf_isretried(bf));
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list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
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list_move_tail(&bf->list, &bf_head);
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ath_tx_send_normal(sc, txq, tid, &bf_head);
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}
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@ -212,9 +212,9 @@ static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq,
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for (;;) {
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if (list_empty(&tid->buf_q))
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break;
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bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
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list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
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bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
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list_move_tail(&bf->list, &bf_head);
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if (bf_isretried(bf))
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ath_tx_update_baw(sc, tid, bf->bf_seqno);
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@ -241,17 +241,37 @@ static void ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
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hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
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}
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static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf, struct list_head *bf_q,
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int txok)
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static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf)
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{
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struct ath_buf *tbf;
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spin_lock_bh(&sc->tx.txbuflock);
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ASSERT(!list_empty((&sc->tx.txbuf)));
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tbf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
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list_del(&tbf->list);
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spin_unlock_bh(&sc->tx.txbuflock);
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ATH_TXBUF_RESET(tbf);
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tbf->bf_mpdu = bf->bf_mpdu;
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tbf->bf_buf_addr = bf->bf_buf_addr;
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*(tbf->bf_desc) = *(bf->bf_desc);
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tbf->bf_state = bf->bf_state;
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tbf->bf_dmacontext = bf->bf_dmacontext;
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return tbf;
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}
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static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_buf *bf, struct list_head *bf_q,
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int txok)
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{
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struct ath_node *an = NULL;
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struct sk_buff *skb;
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struct ieee80211_tx_info *tx_info;
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struct ath_atx_tid *tid = NULL;
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struct ath_buf *bf_last = bf->bf_lastbf;
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struct ath_buf *bf_next, *bf_last = bf->bf_lastbf;
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struct ath_desc *ds = bf_last->bf_desc;
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struct ath_buf *bf_next, *bf_lastq = NULL;
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struct list_head bf_head, bf_pending;
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u16 seq_st = 0;
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u32 ba[WME_BA_BMP_SIZE >> 5];
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@ -266,28 +286,23 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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}
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isaggr = bf_isaggr(bf);
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if (isaggr) {
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if (txok) {
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if (ATH_DS_TX_BA(ds)) {
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seq_st = ATH_DS_BA_SEQ(ds);
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memcpy(ba, ATH_DS_BA_BITMAP(ds),
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WME_BA_BMP_SIZE >> 3);
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} else {
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memset(ba, 0, WME_BA_BMP_SIZE >> 3);
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memset(ba, 0, WME_BA_BMP_SIZE >> 3);
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/*
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* AR5416 can become deaf/mute when BA
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* issue happens. Chip needs to be reset.
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* But AP code may have sychronization issues
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* when perform internal reset in this routine.
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* Only enable reset in STA mode for now.
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*/
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if (sc->sc_ah->ah_opmode ==
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NL80211_IFTYPE_STATION)
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needreset = 1;
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}
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if (isaggr && txok) {
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if (ATH_DS_TX_BA(ds)) {
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seq_st = ATH_DS_BA_SEQ(ds);
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memcpy(ba, ATH_DS_BA_BITMAP(ds),
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WME_BA_BMP_SIZE >> 3);
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} else {
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memset(ba, 0, WME_BA_BMP_SIZE >> 3);
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/*
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* AR5416 can become deaf/mute when BA
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* issue happens. Chip needs to be reset.
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* But AP code may have sychronization issues
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* when perform internal reset in this routine.
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* Only enable reset in STA mode for now.
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*/
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if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION)
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needreset = 1;
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}
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}
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@ -304,7 +319,6 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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} else if (!isaggr && txok) {
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/* transmit completion */
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} else {
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if (!(tid->state & AGGR_CLEANUP) &&
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ds->ds_txstat.ts_flags != ATH9K_TX_SW_ABORTED) {
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if (bf->bf_retries < ATH_MAX_SW_RETRIES) {
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@ -325,19 +339,10 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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}
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if (bf_next == NULL) {
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ASSERT(bf->bf_lastfrm == bf_last);
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if (!list_empty(bf_q)) {
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bf_lastq = list_entry(bf_q->prev,
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struct ath_buf, list);
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list_cut_position(&bf_head,
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bf_q, &bf_lastq->list);
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} else {
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INIT_LIST_HEAD(&bf_head);
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}
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INIT_LIST_HEAD(&bf_head);
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} else {
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ASSERT(!list_empty(bf_q));
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list_cut_position(&bf_head,
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bf_q, &bf->bf_lastfrm->list);
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list_move_tail(&bf->list, &bf_head);
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}
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if (!txpending) {
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@ -351,53 +356,20 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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ath_tx_complete_buf(sc, bf, &bf_head, !txfail, sendbar);
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} else {
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/*
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* retry the un-acked ones
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*/
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/* retry the un-acked ones */
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if (bf->bf_next == NULL &&
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bf_last->bf_status & ATH_BUFSTATUS_STALE) {
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struct ath_buf *tbf;
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/* allocate new descriptor */
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spin_lock_bh(&sc->tx.txbuflock);
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ASSERT(!list_empty((&sc->tx.txbuf)));
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tbf = list_first_entry(&sc->tx.txbuf,
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struct ath_buf, list);
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list_del(&tbf->list);
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spin_unlock_bh(&sc->tx.txbuflock);
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ATH_TXBUF_RESET(tbf);
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/* copy descriptor content */
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tbf->bf_mpdu = bf_last->bf_mpdu;
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tbf->bf_buf_addr = bf_last->bf_buf_addr;
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*(tbf->bf_desc) = *(bf_last->bf_desc);
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/* link it to the frame */
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if (bf_lastq) {
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bf_lastq->bf_desc->ds_link =
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tbf->bf_daddr;
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bf->bf_lastfrm = tbf;
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ath9k_hw_cleartxdesc(sc->sc_ah,
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bf->bf_lastfrm->bf_desc);
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} else {
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tbf->bf_state = bf_last->bf_state;
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tbf->bf_lastfrm = tbf;
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ath9k_hw_cleartxdesc(sc->sc_ah,
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tbf->bf_lastfrm->bf_desc);
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/* copy the DMA context */
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tbf->bf_dmacontext =
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bf_last->bf_dmacontext;
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}
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tbf = ath_clone_txbuf(sc, bf_last);
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ath9k_hw_cleartxdesc(sc->sc_ah, tbf->bf_desc);
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list_add_tail(&tbf->list, &bf_head);
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} else {
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/*
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* Clear descriptor status words for
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* software retry
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*/
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ath9k_hw_cleartxdesc(sc->sc_ah,
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bf->bf_lastfrm->bf_desc);
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ath9k_hw_cleartxdesc(sc->sc_ah, bf->bf_desc);
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}
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/*
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@ -411,27 +383,18 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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}
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if (tid->state & AGGR_CLEANUP) {
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/* check to see if we're done with cleaning the h/w queue */
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spin_lock_bh(&txq->axq_lock);
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if (tid->baw_head == tid->baw_tail) {
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tid->state &= ~AGGR_ADDBA_COMPLETE;
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tid->addba_exchangeattempts = 0;
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spin_unlock_bh(&txq->axq_lock);
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tid->state &= ~AGGR_CLEANUP;
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/* send buffered frames as singles */
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ath_tx_flush_tid(sc, tid);
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} else
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spin_unlock_bh(&txq->axq_lock);
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}
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return;
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}
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/*
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* prepend un-acked frames to the beginning of the pending frame queue
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*/
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/* prepend un-acked frames to the beginning of the pending frame queue */
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if (!list_empty(&bf_pending)) {
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spin_lock_bh(&txq->axq_lock);
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list_splice(&bf_pending, &tid->buf_q);
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@ -441,8 +404,6 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, struct ath_txq *txq,
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if (needreset)
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ath_reset(sc, false);
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return;
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}
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static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
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@ -453,15 +414,14 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
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struct ieee80211_tx_info *tx_info;
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struct ieee80211_tx_rate *rates;
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struct ath_tx_info_priv *tx_info_priv;
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u32 max_4ms_framelen, frame_length;
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u32 max_4ms_framelen, frmlen;
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u16 aggr_limit, legacy = 0, maxampdu;
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int i;
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skb = (struct sk_buff *)bf->bf_mpdu;
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tx_info = IEEE80211_SKB_CB(skb);
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rates = tx_info->control.rates;
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tx_info_priv =
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(struct ath_tx_info_priv *)tx_info->rate_driver_data[0];
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tx_info_priv = (struct ath_tx_info_priv *)tx_info->rate_driver_data[0];
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/*
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* Find the lowest frame length among the rate series that will have a
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@ -477,9 +437,8 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
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break;
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}
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frame_length =
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rate_table->info[rates[i].idx].max_4ms_framelen;
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max_4ms_framelen = min(max_4ms_framelen, frame_length);
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frmlen = rate_table->info[rates[i].idx].max_4ms_framelen;
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max_4ms_framelen = min(max_4ms_framelen, frmlen);
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}
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}
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@ -491,8 +450,7 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
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if (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE || legacy)
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return 0;
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aggr_limit = min(max_4ms_framelen,
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(u32)ATH_AMPDU_LIMIT_DEFAULT);
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aggr_limit = min(max_4ms_framelen, (u32)ATH_AMPDU_LIMIT_DEFAULT);
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/*
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* h/w can accept aggregates upto 16 bit lengths (65535).
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@ -507,9 +465,9 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
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}
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/*
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* returns the number of delimiters to be added to
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* Returns the number of delimiters to be added to
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* meet the minimum required mpdudensity.
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* caller should make sure that the rate is HT rate .
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* caller should make sure that the rate is HT rate .
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*/
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static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
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struct ath_buf *bf, u16 frmlen)
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@ -566,9 +524,7 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
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nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width];
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minlen = (nsymbols * nsymbits) / BITS_PER_BYTE;
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/* Is frame shorter than required minimum length? */
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if (frmlen < minlen) {
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/* Get the minimum number of delimiters required. */
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mindelim = (minlen - frmlen) / ATH_AGGR_DELIM_SZ;
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ndelim = max(mindelim, ndelim);
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}
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@ -577,30 +533,22 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
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}
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static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
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struct ath_atx_tid *tid, struct list_head *bf_q,
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struct ath_buf **bf_last, struct aggr_rifs_param *param,
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int *prev_frames)
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struct ath_atx_tid *tid,
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struct list_head *bf_q)
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{
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#define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
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struct ath_buf *bf, *tbf, *bf_first, *bf_prev = NULL;
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struct list_head bf_head;
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int rl = 0, nframes = 0, ndelim;
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struct ath_buf *bf, *bf_first, *bf_prev = NULL;
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int rl = 0, nframes = 0, ndelim, prev_al = 0;
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u16 aggr_limit = 0, al = 0, bpad = 0,
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al_delta, h_baw = tid->baw_size / 2;
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enum ATH_AGGR_STATUS status = ATH_AGGR_DONE;
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int prev_al = 0;
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INIT_LIST_HEAD(&bf_head);
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BUG_ON(list_empty(&tid->buf_q));
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bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list);
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do {
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bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
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/*
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* do not step over block-ack window
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*/
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/* do not step over block-ack window */
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if (!BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno)) {
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status = ATH_AGGR_BAW_CLOSED;
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break;
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@ -611,29 +559,23 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
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rl = 1;
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}
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/*
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* do not exceed aggregation limit
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*/
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/* do not exceed aggregation limit */
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al_delta = ATH_AGGR_DELIM_SZ + bf->bf_frmlen;
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if (nframes && (aggr_limit <
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(al + bpad + al_delta + prev_al))) {
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if (nframes &&
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(aggr_limit < (al + bpad + al_delta + prev_al))) {
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status = ATH_AGGR_LIMITED;
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break;
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}
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/*
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* do not exceed subframe limit
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*/
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if ((nframes + *prev_frames) >=
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min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) {
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/* do not exceed subframe limit */
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if (nframes >= min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) {
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status = ATH_AGGR_LIMITED;
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break;
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}
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nframes++;
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/*
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* add padding for previous frame to aggregation length
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*/
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/* add padding for previous frame to aggregation length */
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al += bpad + al_delta;
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/*
|
||||
@ -641,44 +583,25 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
|
||||
* density for this node.
|
||||
*/
|
||||
ndelim = ath_compute_num_delims(sc, tid, bf_first, bf->bf_frmlen);
|
||||
|
||||
bpad = PADBYTES(al_delta) + (ndelim << 2);
|
||||
|
||||
bf->bf_next = NULL;
|
||||
bf->bf_lastfrm->bf_desc->ds_link = 0;
|
||||
bf->bf_desc->ds_link = 0;
|
||||
|
||||
/*
|
||||
* this packet is part of an aggregate
|
||||
* - remove all descriptors belonging to this frame from
|
||||
* software queue
|
||||
* - add it to block ack window
|
||||
* - set up descriptors for aggregation
|
||||
*/
|
||||
list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
|
||||
/* link buffers of this frame to the aggregate */
|
||||
ath_tx_addto_baw(sc, tid, bf);
|
||||
|
||||
list_for_each_entry(tbf, &bf_head, list) {
|
||||
ath9k_hw_set11n_aggr_middle(sc->sc_ah,
|
||||
tbf->bf_desc, ndelim);
|
||||
}
|
||||
|
||||
/*
|
||||
* link buffers of this frame to the aggregate
|
||||
*/
|
||||
list_splice_tail_init(&bf_head, bf_q);
|
||||
nframes++;
|
||||
|
||||
ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim);
|
||||
list_move_tail(&bf->list, bf_q);
|
||||
if (bf_prev) {
|
||||
bf_prev->bf_next = bf;
|
||||
bf_prev->bf_lastfrm->bf_desc->ds_link = bf->bf_daddr;
|
||||
bf_prev->bf_desc->ds_link = bf->bf_daddr;
|
||||
}
|
||||
bf_prev = bf;
|
||||
|
||||
} while (!list_empty(&tid->buf_q));
|
||||
|
||||
bf_first->bf_al = al;
|
||||
bf_first->bf_nframes = nframes;
|
||||
*bf_last = bf_prev;
|
||||
|
||||
return status;
|
||||
#undef PADBYTES
|
||||
}
|
||||
@ -686,11 +609,9 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
|
||||
static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
struct ath_atx_tid *tid)
|
||||
{
|
||||
struct ath_buf *bf, *tbf, *bf_last, *bf_lastaggr = NULL;
|
||||
struct ath_buf *bf;
|
||||
enum ATH_AGGR_STATUS status;
|
||||
struct list_head bf_q;
|
||||
struct aggr_rifs_param param = {0, 0, 0, 0, NULL};
|
||||
int prev_frames = 0;
|
||||
|
||||
do {
|
||||
if (list_empty(&tid->buf_q))
|
||||
@ -698,66 +619,36 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
|
||||
INIT_LIST_HEAD(&bf_q);
|
||||
|
||||
status = ath_tx_form_aggr(sc, tid, &bf_q, &bf_lastaggr, ¶m,
|
||||
&prev_frames);
|
||||
status = ath_tx_form_aggr(sc, tid, &bf_q);
|
||||
|
||||
/*
|
||||
* no frames picked up to be aggregated; block-ack
|
||||
* window is not open
|
||||
* no frames picked up to be aggregated;
|
||||
* block-ack window is not open.
|
||||
*/
|
||||
if (list_empty(&bf_q))
|
||||
break;
|
||||
|
||||
bf = list_first_entry(&bf_q, struct ath_buf, list);
|
||||
bf_last = list_entry(bf_q.prev, struct ath_buf, list);
|
||||
bf->bf_lastbf = bf_last;
|
||||
bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
|
||||
|
||||
/*
|
||||
* if only one frame, send as non-aggregate
|
||||
*/
|
||||
/* if only one frame, send as non-aggregate */
|
||||
if (bf->bf_nframes == 1) {
|
||||
ASSERT(bf->bf_lastfrm == bf_last);
|
||||
|
||||
bf->bf_state.bf_type &= ~BUF_AGGR;
|
||||
/*
|
||||
* clear aggr bits for every descriptor
|
||||
* XXX TODO: is there a way to optimize it?
|
||||
*/
|
||||
list_for_each_entry(tbf, &bf_q, list) {
|
||||
ath9k_hw_clr11n_aggr(sc->sc_ah, tbf->bf_desc);
|
||||
}
|
||||
|
||||
ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc);
|
||||
ath_buf_set_rate(sc, bf);
|
||||
ath_tx_txqaddbuf(sc, txq, &bf_q);
|
||||
continue;
|
||||
}
|
||||
|
||||
/*
|
||||
* setup first desc with rate and aggr info
|
||||
*/
|
||||
/* setup first desc of aggregate */
|
||||
bf->bf_state.bf_type |= BUF_AGGR;
|
||||
ath_buf_set_rate(sc, bf);
|
||||
ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al);
|
||||
|
||||
/*
|
||||
* anchor last frame of aggregate correctly
|
||||
*/
|
||||
ASSERT(bf_lastaggr);
|
||||
ASSERT(bf_lastaggr->bf_lastfrm == bf_last);
|
||||
tbf = bf_lastaggr;
|
||||
ath9k_hw_set11n_aggr_last(sc->sc_ah, tbf->bf_desc);
|
||||
|
||||
/* XXX: We don't enter into this loop, consider removing this */
|
||||
while (!list_empty(&bf_q) && !list_is_last(&tbf->list, &bf_q)) {
|
||||
tbf = list_entry(tbf->list.next, struct ath_buf, list);
|
||||
ath9k_hw_set11n_aggr_last(sc->sc_ah, tbf->bf_desc);
|
||||
}
|
||||
/* anchor last desc of aggregate */
|
||||
ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
|
||||
|
||||
txq->axq_aggr_depth++;
|
||||
|
||||
/*
|
||||
* Normal aggregate, queue to hardware
|
||||
*/
|
||||
ath_tx_txqaddbuf(sc, txq, &bf_q);
|
||||
|
||||
} while (txq->axq_depth < ATH_AGGR_MIN_QDEPTH &&
|
||||
@ -812,19 +703,17 @@ int ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
|
||||
*/
|
||||
break;
|
||||
}
|
||||
list_cut_position(&bf_head,
|
||||
&txtid->buf_q, &bf->bf_lastfrm->list);
|
||||
list_move_tail(&bf->list, &bf_head);
|
||||
ath_tx_update_baw(sc, txtid, bf->bf_seqno);
|
||||
ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
|
||||
}
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
|
||||
if (txtid->baw_head != txtid->baw_tail) {
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
txtid->state |= AGGR_CLEANUP;
|
||||
} else {
|
||||
txtid->state &= ~AGGR_ADDBA_COMPLETE;
|
||||
txtid->addba_exchangeattempts = 0;
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_tx_flush_tid(sc, txtid);
|
||||
}
|
||||
|
||||
@ -1130,7 +1019,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
|
||||
if (bf_isampdu(bf))
|
||||
ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, 0);
|
||||
ath_tx_complete_aggr(sc, txq, bf, &bf_head, 0);
|
||||
else
|
||||
ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
|
||||
}
|
||||
@ -1326,8 +1215,6 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
|
||||
BUG_ON(list_empty(bf_head));
|
||||
|
||||
bf = list_first_entry(bf_head, struct ath_buf, list);
|
||||
bf->bf_state.bf_type |= BUF_AMPDU;
|
||||
|
||||
@ -1345,7 +1232,7 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
|
||||
* Add this frame to software queue for scheduling later
|
||||
* for aggregation.
|
||||
*/
|
||||
list_splice_tail_init(bf_head, &tid->buf_q);
|
||||
list_move_tail(&bf->list, &tid->buf_q);
|
||||
ath_tx_queue_tid(txctl->txq, tid);
|
||||
return;
|
||||
}
|
||||
@ -1355,11 +1242,9 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
|
||||
|
||||
/* Queue to h/w without aggregation */
|
||||
bf->bf_nframes = 1;
|
||||
bf->bf_lastbf = bf->bf_lastfrm; /* one single frame */
|
||||
bf->bf_lastbf = bf;
|
||||
ath_buf_set_rate(sc, bf);
|
||||
ath_tx_txqaddbuf(sc, txctl->txq, bf_head);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
|
||||
@ -1368,8 +1253,6 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
|
||||
BUG_ON(list_empty(bf_head));
|
||||
|
||||
bf = list_first_entry(bf_head, struct ath_buf, list);
|
||||
bf->bf_state.bf_type &= ~BUF_AMPDU;
|
||||
|
||||
@ -1377,7 +1260,7 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
|
||||
INCR(tid->seq_start, IEEE80211_SEQ_MAX);
|
||||
|
||||
bf->bf_nframes = 1;
|
||||
bf->bf_lastbf = bf->bf_lastfrm;
|
||||
bf->bf_lastbf = bf;
|
||||
ath_buf_set_rate(sc, bf);
|
||||
ath_tx_txqaddbuf(sc, txq, bf_head);
|
||||
}
|
||||
@ -1770,8 +1653,6 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
|
||||
true, /* last segment */
|
||||
ds); /* first descriptor */
|
||||
|
||||
bf->bf_lastfrm = bf;
|
||||
|
||||
spin_lock_bh(&txctl->txq->axq_lock);
|
||||
|
||||
if (bf_isht(bf) && (sc->sc_flags & SC_OP_TXAGGR) &&
|
||||
@ -2155,7 +2036,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
|
||||
ath_tx_rc_status(bf, ds, nbad);
|
||||
|
||||
if (bf_isampdu(bf))
|
||||
ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, txok);
|
||||
ath_tx_complete_aggr(sc, txq, bf, &bf_head, txok);
|
||||
else
|
||||
ath_tx_complete_buf(sc, bf, &bf_head, txok, 0);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user