forked from Minki/linux
MIPS: Alchemy: Convert to new irq chip functions
Fix the deadlock in set_type() while at it: The code called set_irq_chip_and_handler_name() resp. set_irq_chip() from the set_type() callback. That only works on UP and lock debugging disabled. Otherwise it would dead lock on desc->lock. __irq_set_chip_handler_name_locked() avoids that. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2173/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Gleixner
Ralf Baechle
parent
786a5e0280
commit
d24c1a26ca
@ -39,7 +39,7 @@
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#include <asm/mach-pb1x00/pb1000.h>
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#endif
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static int au1x_ic_settype(unsigned int irq, unsigned int flow_type);
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static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type);
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/* NOTE on interrupt priorities: The original writers of this code said:
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*
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@ -218,17 +218,17 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = {
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};
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static void au1x_ic0_unmask(unsigned int irq_nr)
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static void au1x_ic0_unmask(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
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au_writel(1 << bit, IC0_MASKSET);
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au_writel(1 << bit, IC0_WAKESET);
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au_sync();
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}
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static void au1x_ic1_unmask(unsigned int irq_nr)
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static void au1x_ic1_unmask(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
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au_writel(1 << bit, IC1_MASKSET);
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au_writel(1 << bit, IC1_WAKESET);
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@ -236,31 +236,31 @@ static void au1x_ic1_unmask(unsigned int irq_nr)
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* nowhere in the current kernel sources is it disabled. --mlau
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*/
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#if defined(CONFIG_MIPS_PB1000)
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if (irq_nr == AU1000_GPIO15_INT)
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if (d->irq == AU1000_GPIO15_INT)
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au_writel(0x4000, PB1000_MDR); /* enable int */
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#endif
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au_sync();
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}
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static void au1x_ic0_mask(unsigned int irq_nr)
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static void au1x_ic0_mask(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
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au_writel(1 << bit, IC0_MASKCLR);
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au_writel(1 << bit, IC0_WAKECLR);
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au_sync();
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}
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static void au1x_ic1_mask(unsigned int irq_nr)
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static void au1x_ic1_mask(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
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au_writel(1 << bit, IC1_MASKCLR);
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au_writel(1 << bit, IC1_WAKECLR);
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au_sync();
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}
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static void au1x_ic0_ack(unsigned int irq_nr)
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static void au1x_ic0_ack(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
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/*
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* This may assume that we don't get interrupts from
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@ -271,9 +271,9 @@ static void au1x_ic0_ack(unsigned int irq_nr)
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au_sync();
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}
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static void au1x_ic1_ack(unsigned int irq_nr)
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static void au1x_ic1_ack(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
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/*
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* This may assume that we don't get interrupts from
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@ -284,9 +284,9 @@ static void au1x_ic1_ack(unsigned int irq_nr)
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au_sync();
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}
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static void au1x_ic0_maskack(unsigned int irq_nr)
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static void au1x_ic0_maskack(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
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au_writel(1 << bit, IC0_WAKECLR);
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au_writel(1 << bit, IC0_MASKCLR);
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@ -295,9 +295,9 @@ static void au1x_ic0_maskack(unsigned int irq_nr)
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au_sync();
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}
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static void au1x_ic1_maskack(unsigned int irq_nr)
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static void au1x_ic1_maskack(struct irq_data *d)
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{
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unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
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unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
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au_writel(1 << bit, IC1_WAKECLR);
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au_writel(1 << bit, IC1_MASKCLR);
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@ -306,9 +306,9 @@ static void au1x_ic1_maskack(unsigned int irq_nr)
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au_sync();
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}
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static int au1x_ic1_setwake(unsigned int irq, unsigned int on)
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static int au1x_ic1_setwake(struct irq_data *d, unsigned int on)
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{
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int bit = irq - AU1000_INTC1_INT_BASE;
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int bit = d->irq - AU1000_INTC1_INT_BASE;
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unsigned long wakemsk, flags;
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/* only GPIO 0-7 can act as wakeup source. Fortunately these
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@ -336,28 +336,30 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on)
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*/
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static struct irq_chip au1x_ic0_chip = {
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.name = "Alchemy-IC0",
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.ack = au1x_ic0_ack,
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.mask = au1x_ic0_mask,
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.mask_ack = au1x_ic0_maskack,
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.unmask = au1x_ic0_unmask,
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.set_type = au1x_ic_settype,
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.irq_ack = au1x_ic0_ack,
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.irq_mask = au1x_ic0_mask,
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.irq_mask_ack = au1x_ic0_maskack,
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.irq_unmask = au1x_ic0_unmask,
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.irq_set_type = au1x_ic_settype,
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};
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static struct irq_chip au1x_ic1_chip = {
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.name = "Alchemy-IC1",
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.ack = au1x_ic1_ack,
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.mask = au1x_ic1_mask,
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.mask_ack = au1x_ic1_maskack,
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.unmask = au1x_ic1_unmask,
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.set_type = au1x_ic_settype,
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.set_wake = au1x_ic1_setwake,
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.irq_ack = au1x_ic1_ack,
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.irq_mask = au1x_ic1_mask,
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.irq_mask_ack = au1x_ic1_maskack,
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.irq_unmask = au1x_ic1_unmask,
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.irq_set_type = au1x_ic_settype,
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.irq_set_wake = au1x_ic1_setwake,
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};
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static int au1x_ic_settype(unsigned int irq, unsigned int flow_type)
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static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type)
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{
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struct irq_chip *chip;
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unsigned long icr[6];
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unsigned int bit, ic;
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unsigned int bit, ic, irq = d->irq;
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irq_flow_handler_t handler = NULL;
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unsigned char *name = NULL;
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int ret;
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if (irq >= AU1000_INTC1_INT_BASE) {
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@ -387,47 +389,47 @@ static int au1x_ic_settype(unsigned int irq, unsigned int flow_type)
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au_writel(1 << bit, icr[5]);
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au_writel(1 << bit, icr[4]);
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au_writel(1 << bit, icr[0]);
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set_irq_chip_and_handler_name(irq, chip,
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handle_edge_irq, "riseedge");
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handler = handle_edge_irq;
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name = "riseedge";
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break;
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case IRQ_TYPE_EDGE_FALLING: /* 0:1:0 */
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au_writel(1 << bit, icr[5]);
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au_writel(1 << bit, icr[1]);
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au_writel(1 << bit, icr[3]);
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set_irq_chip_and_handler_name(irq, chip,
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handle_edge_irq, "falledge");
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handler = handle_edge_irq;
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name = "falledge";
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break;
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case IRQ_TYPE_EDGE_BOTH: /* 0:1:1 */
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au_writel(1 << bit, icr[5]);
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au_writel(1 << bit, icr[1]);
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au_writel(1 << bit, icr[0]);
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set_irq_chip_and_handler_name(irq, chip,
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handle_edge_irq, "bothedge");
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handler = handle_edge_irq;
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name = "bothedge";
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break;
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case IRQ_TYPE_LEVEL_HIGH: /* 1:0:1 */
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au_writel(1 << bit, icr[2]);
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au_writel(1 << bit, icr[4]);
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au_writel(1 << bit, icr[0]);
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set_irq_chip_and_handler_name(irq, chip,
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handle_level_irq, "hilevel");
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handler = handle_level_irq;
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name = "hilevel";
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break;
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case IRQ_TYPE_LEVEL_LOW: /* 1:1:0 */
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au_writel(1 << bit, icr[2]);
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au_writel(1 << bit, icr[1]);
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au_writel(1 << bit, icr[3]);
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set_irq_chip_and_handler_name(irq, chip,
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handle_level_irq, "lowlevel");
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handler = handle_level_irq;
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name = "lowlevel";
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break;
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case IRQ_TYPE_NONE: /* 0:0:0 */
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au_writel(1 << bit, icr[5]);
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au_writel(1 << bit, icr[4]);
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au_writel(1 << bit, icr[3]);
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/* set at least chip so we can call set_irq_type() on it */
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set_irq_chip(irq, chip);
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break;
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default:
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ret = -EINVAL;
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}
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__irq_set_chip_handler_name_locked(d->irq, chip, handler, name);
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au_sync();
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return ret;
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@ -504,11 +506,11 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map)
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*/
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for (i = AU1000_INTC0_INT_BASE;
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(i < AU1000_INTC0_INT_BASE + 32); i++)
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au1x_ic_settype(i, IRQ_TYPE_NONE);
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au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
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for (i = AU1000_INTC1_INT_BASE;
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(i < AU1000_INTC1_INT_BASE + 32); i++)
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au1x_ic_settype(i, IRQ_TYPE_NONE);
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au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
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/*
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* Initialize IC0, which is fixed per processor.
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@ -526,7 +528,7 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map)
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au_writel(1 << bit, IC0_ASSIGNSET);
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}
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au1x_ic_settype(irq_nr, map->im_type);
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au1x_ic_settype(irq_get_irq_data(irq_nr), map->im_type);
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++map;
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}
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@ -97,26 +97,26 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d)
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* CPLD generates tons of spurious interrupts (at least on my DB1200).
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* -- mlau
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*/
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static void bcsr_irq_mask(unsigned int irq_nr)
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static void bcsr_irq_mask(struct irq_data *d)
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{
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unsigned short v = 1 << (irq_nr - bcsr_csc_base);
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unsigned short v = 1 << (d->irq - bcsr_csc_base);
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__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
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__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
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wmb();
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}
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static void bcsr_irq_maskack(unsigned int irq_nr)
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static void bcsr_irq_maskack(struct irq_data *d)
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{
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unsigned short v = 1 << (irq_nr - bcsr_csc_base);
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unsigned short v = 1 << (d->irq - bcsr_csc_base);
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__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
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__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
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__raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */
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wmb();
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}
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static void bcsr_irq_unmask(unsigned int irq_nr)
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static void bcsr_irq_unmask(struct irq_data *d)
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{
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unsigned short v = 1 << (irq_nr - bcsr_csc_base);
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unsigned short v = 1 << (d->irq - bcsr_csc_base);
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__raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
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__raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
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wmb();
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@ -124,9 +124,9 @@ static void bcsr_irq_unmask(unsigned int irq_nr)
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static struct irq_chip bcsr_irq_type = {
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.name = "CPLD",
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.mask = bcsr_irq_mask,
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.mask_ack = bcsr_irq_maskack,
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.unmask = bcsr_irq_unmask,
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.irq_mask = bcsr_irq_mask,
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.irq_mask_ack = bcsr_irq_maskack,
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.irq_unmask = bcsr_irq_unmask,
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};
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void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq)
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