forked from Minki/linux
spi: spi-fsl-dspi: Enable TCF interrupt mode support
DSPI module has two optional interrupts when complete data transfer. One is EOQ interrupt, the other one is TCF interrupt. EOQ indicates a queue of data frame has been transmitted. TCF indicates a frame has been transmitted. This patch enable support TCF mode. Driver binds a correct interrupt mode to every compatible string. User should use the correct compatible string in the dts node. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Haikun Wang
Mark Brown
parent
6724af4869
commit
d1f4a38c81
@ -67,9 +67,11 @@
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#define SPI_SR 0x2c
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#define SPI_SR_EOQF 0x10000000
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#define SPI_SR_TCFQF 0x80000000
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#define SPI_RSER 0x30
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#define SPI_RSER_EOQFE 0x10000000
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#define SPI_RSER_TCFQE 0x80000000
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#define SPI_PUSHR 0x34
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#define SPI_PUSHR_CONT (1 << 31)
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@ -108,6 +110,27 @@ struct chip_data {
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u16 void_write_data;
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};
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enum dspi_trans_mode {
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DSPI_EOQ_MODE = 0,
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DSPI_TCFQ_MODE,
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};
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struct fsl_dspi_devtype_data {
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enum dspi_trans_mode trans_mode;
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};
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static const struct fsl_dspi_devtype_data vf610_data = {
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.trans_mode = DSPI_EOQ_MODE,
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};
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static const struct fsl_dspi_devtype_data ls1021a_v1_data = {
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.trans_mode = DSPI_TCFQ_MODE,
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};
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static const struct fsl_dspi_devtype_data ls2085a_data = {
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.trans_mode = DSPI_TCFQ_MODE,
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};
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struct fsl_dspi {
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struct spi_master *master;
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struct platform_device *pdev;
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@ -128,6 +151,7 @@ struct fsl_dspi {
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u8 cs;
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u16 void_write_data;
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u32 cs_change;
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struct fsl_dspi_devtype_data *devtype_data;
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wait_queue_head_t waitq;
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u32 waitflags;
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@ -213,63 +237,61 @@ static void ns_delay_scale(char *psc, char *sc, int delay_ns,
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}
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}
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static int dspi_transfer_write(struct fsl_dspi *dspi)
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static u32 dspi_data_to_pushr(struct fsl_dspi *dspi, int tx_word)
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{
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u16 d16;
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if (!(dspi->dataflags & TRAN_STATE_TX_VOID))
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d16 = tx_word ? *(u16 *)dspi->tx : *(u8 *)dspi->tx;
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else
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d16 = dspi->void_write_data;
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dspi->tx += tx_word + 1;
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dspi->len -= tx_word + 1;
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return SPI_PUSHR_TXDATA(d16) |
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SPI_PUSHR_PCS(dspi->cs) |
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SPI_PUSHR_CTAS(dspi->cs) |
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SPI_PUSHR_CONT;
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}
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static void dspi_data_from_popr(struct fsl_dspi *dspi, int rx_word)
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{
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u16 d;
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unsigned int val;
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regmap_read(dspi->regmap, SPI_POPR, &val);
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d = SPI_POPR_RXDATA(val);
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if (!(dspi->dataflags & TRAN_STATE_RX_VOID))
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rx_word ? (*(u16 *)dspi->rx = d) : (*(u8 *)dspi->rx = d);
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dspi->rx += rx_word + 1;
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}
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static int dspi_eoq_write(struct fsl_dspi *dspi)
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{
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int tx_count = 0;
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int tx_word;
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u16 d16;
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u8 d8;
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u32 dspi_pushr = 0;
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int first = 1;
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tx_word = is_double_byte_mode(dspi);
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/* If we are in word mode, but only have a single byte to transfer
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* then switch to byte mode temporarily. Will switch back at the
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* end of the transfer.
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*/
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if (tx_word && (dspi->len == 1)) {
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dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM;
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regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
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SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(8));
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tx_word = 0;
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}
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while (dspi->len && (tx_count < DSPI_FIFO_SIZE)) {
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if (tx_word) {
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if (dspi->len == 1)
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break;
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if (!(dspi->dataflags & TRAN_STATE_TX_VOID)) {
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d16 = *(u16 *)dspi->tx;
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dspi->tx += 2;
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} else {
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d16 = dspi->void_write_data;
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}
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dspi_pushr = SPI_PUSHR_TXDATA(d16) |
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SPI_PUSHR_PCS(dspi->cs) |
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SPI_PUSHR_CTAS(dspi->cs) |
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SPI_PUSHR_CONT;
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dspi->len -= 2;
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} else {
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if (!(dspi->dataflags & TRAN_STATE_TX_VOID)) {
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d8 = *(u8 *)dspi->tx;
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dspi->tx++;
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} else {
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d8 = (u8)dspi->void_write_data;
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}
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dspi_pushr = SPI_PUSHR_TXDATA(d8) |
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SPI_PUSHR_PCS(dspi->cs) |
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SPI_PUSHR_CTAS(dspi->cs) |
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SPI_PUSHR_CONT;
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dspi->len--;
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/* If we are in word mode, only have a single byte to transfer
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* switch to byte mode temporarily. Will switch back at the
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* end of the transfer.
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*/
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if (tx_word && (dspi->len == 1)) {
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dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM;
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regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
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SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(8));
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tx_word = 0;
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}
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dspi_pushr = dspi_data_to_pushr(dspi, tx_word);
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if (dspi->len == 0 || tx_count == DSPI_FIFO_SIZE - 1) {
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/* last transfer in the transfer */
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dspi_pushr |= SPI_PUSHR_EOQ;
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@ -291,42 +313,57 @@ static int dspi_transfer_write(struct fsl_dspi *dspi)
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return tx_count * (tx_word + 1);
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}
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static int dspi_transfer_read(struct fsl_dspi *dspi)
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static int dspi_eoq_read(struct fsl_dspi *dspi)
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{
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int rx_count = 0;
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int rx_word = is_double_byte_mode(dspi);
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u16 d;
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while ((dspi->rx < dspi->rx_end)
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&& (rx_count < DSPI_FIFO_SIZE)) {
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if (rx_word) {
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unsigned int val;
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if (rx_word && (dspi->rx_end - dspi->rx) == 1)
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rx_word = 0;
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if ((dspi->rx_end - dspi->rx) == 1)
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break;
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regmap_read(dspi->regmap, SPI_POPR, &val);
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d = SPI_POPR_RXDATA(val);
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if (!(dspi->dataflags & TRAN_STATE_RX_VOID))
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*(u16 *)dspi->rx = d;
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dspi->rx += 2;
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} else {
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unsigned int val;
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regmap_read(dspi->regmap, SPI_POPR, &val);
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d = SPI_POPR_RXDATA(val);
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if (!(dspi->dataflags & TRAN_STATE_RX_VOID))
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*(u8 *)dspi->rx = d;
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dspi->rx++;
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}
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dspi_data_from_popr(dspi, rx_word);
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rx_count++;
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}
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return rx_count;
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}
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static int dspi_tcfq_write(struct fsl_dspi *dspi)
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{
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int tx_word;
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u32 dspi_pushr = 0;
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tx_word = is_double_byte_mode(dspi);
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if (tx_word && (dspi->len == 1)) {
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dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM;
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regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
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SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(8));
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tx_word = 0;
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}
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dspi_pushr = dspi_data_to_pushr(dspi, tx_word);
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if ((dspi->cs_change) && (!dspi->len))
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dspi_pushr &= ~SPI_PUSHR_CONT;
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regmap_write(dspi->regmap, SPI_PUSHR, dspi_pushr);
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return tx_word + 1;
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}
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static void dspi_tcfq_read(struct fsl_dspi *dspi)
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{
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int rx_word = is_double_byte_mode(dspi);
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if (rx_word && (dspi->rx_end - dspi->rx) == 1)
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rx_word = 0;
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dspi_data_from_popr(dspi, rx_word);
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}
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static int dspi_transfer_one_message(struct spi_master *master,
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struct spi_message *message)
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{
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@ -334,6 +371,8 @@ static int dspi_transfer_one_message(struct spi_master *master,
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struct spi_device *spi = message->spi;
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struct spi_transfer *transfer;
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int status = 0;
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enum dspi_trans_mode trans_mode;
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message->actual_length = 0;
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list_for_each_entry(transfer, &message->transfers, transfer_list) {
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@ -370,8 +409,22 @@ static int dspi_transfer_one_message(struct spi_master *master,
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regmap_write(dspi->regmap, SPI_CTAR(dspi->cs),
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dspi->cur_chip->ctar_val);
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regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_EOQFE);
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message->actual_length += dspi_transfer_write(dspi);
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trans_mode = dspi->devtype_data->trans_mode;
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switch (trans_mode) {
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case DSPI_EOQ_MODE:
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regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_EOQFE);
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message->actual_length += dspi_eoq_write(dspi);
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break;
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case DSPI_TCFQ_MODE:
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regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_TCFQE);
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message->actual_length += dspi_tcfq_write(dspi);
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break;
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default:
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dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n",
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trans_mode);
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status = -EINVAL;
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goto out;
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}
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if (wait_event_interruptible(dspi->waitq, dspi->waitflags))
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dev_err(&dspi->pdev->dev, "wait transfer complete fail!\n");
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@ -381,6 +434,7 @@ static int dspi_transfer_one_message(struct spi_master *master,
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udelay(transfer->delay_usecs);
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}
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out:
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message->status = status;
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spi_finalize_current_message(master);
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@ -460,27 +514,57 @@ static void dspi_cleanup(struct spi_device *spi)
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static irqreturn_t dspi_interrupt(int irq, void *dev_id)
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{
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struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id;
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struct spi_message *msg = dspi->cur_msg;
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enum dspi_trans_mode trans_mode;
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u32 spi_sr;
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regmap_write(dspi->regmap, SPI_SR, SPI_SR_EOQF);
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dspi_transfer_read(dspi);
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regmap_read(dspi->regmap, SPI_SR, &spi_sr);
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regmap_write(dspi->regmap, SPI_SR, spi_sr);
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trans_mode = dspi->devtype_data->trans_mode;
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switch (trans_mode) {
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case DSPI_EOQ_MODE:
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dspi_eoq_read(dspi);
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break;
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case DSPI_TCFQ_MODE:
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dspi_tcfq_read(dspi);
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break;
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default:
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dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n",
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trans_mode);
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return IRQ_HANDLED;
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}
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if (!dspi->len) {
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if (dspi->dataflags & TRAN_STATE_WORD_ODD_NUM)
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if (dspi->dataflags & TRAN_STATE_WORD_ODD_NUM) {
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regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
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SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(16));
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dspi->dataflags &= ~TRAN_STATE_WORD_ODD_NUM;
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}
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dspi->waitflags = 1;
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wake_up_interruptible(&dspi->waitq);
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} else
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msg->actual_length += dspi_transfer_write(dspi);
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} else {
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switch (trans_mode) {
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case DSPI_EOQ_MODE:
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msg->actual_length += dspi_eoq_write(dspi);
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break;
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case DSPI_TCFQ_MODE:
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msg->actual_length += dspi_tcfq_write(dspi);
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break;
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default:
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dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n",
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trans_mode);
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}
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}
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return IRQ_HANDLED;
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}
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static const struct of_device_id fsl_dspi_dt_ids[] = {
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{ .compatible = "fsl,vf610-dspi", .data = NULL, },
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{ .compatible = "fsl,vf610-dspi", .data = (void *)&vf610_data, },
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{ .compatible = "fsl,ls1021a-v1.0-dspi",
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.data = (void *)&ls1021a_v1_data, },
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{ .compatible = "fsl,ls2085a-dspi", .data = (void *)&ls2085a_data, },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, fsl_dspi_dt_ids);
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@ -526,6 +610,8 @@ static int dspi_probe(struct platform_device *pdev)
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struct resource *res;
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void __iomem *base;
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int ret = 0, cs_num, bus_num;
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const struct of_device_id *of_id =
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of_match_device(fsl_dspi_dt_ids, &pdev->dev);
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master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi));
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if (!master)
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@ -559,6 +645,13 @@ static int dspi_probe(struct platform_device *pdev)
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}
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master->bus_num = bus_num;
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dspi->devtype_data = (struct fsl_dspi_devtype_data *)of_id->data;
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if (!dspi->devtype_data) {
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dev_err(&pdev->dev, "can't get devtype_data\n");
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ret = -EFAULT;
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goto out_master_put;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base)) {
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