regulator: s5m8767: Do not use sec_reg* regmap helpers
Replace calls to sec_reg* helpers with direct usage of regmap API. The sec_reg* helpers are error-prone as they mix u8 with unsigned int and order of some of parameters (val and mask in sec_reg_update()). Also the helpers do not give any way of useful abstraction as they just call corresponding regmap function. This patch replaces: - sec_reg_read() with regmap_read(), - sec_reg_write() with regmap_write(), - sec_reg_update() with regmap_update_bits(). Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -23,6 +23,7 @@
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#include <linux/mfd/samsung/core.h>
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#include <linux/mfd/samsung/s5m8767.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/regmap.h>
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#define S5M8767_OPMODE_NORMAL_MODE 0x1
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@ -226,7 +227,7 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
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else if (ret)
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return ret;
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ret = sec_reg_read(s5m8767->iodev, reg, &val);
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ret = regmap_read(s5m8767->iodev->regmap_pmic, reg, &val);
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if (ret)
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return ret;
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@ -243,21 +244,21 @@ static int s5m8767_reg_enable(struct regulator_dev *rdev)
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if (ret)
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return ret;
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return sec_reg_update(s5m8767->iodev, reg, enable_ctrl,
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S5M8767_ENCTRL_MASK);
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return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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S5M8767_ENCTRL_MASK, enable_ctrl);
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}
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static int s5m8767_reg_disable(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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int mask = S5M8767_ENCTRL_MASK, enable_ctrl;
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int ret, reg, enable_ctrl;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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if (ret)
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return ret;
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return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
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return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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S5M8767_ENCTRL_MASK, ~S5M8767_ENCTRL_MASK);
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}
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static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
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@ -749,17 +750,20 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck2_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
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buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck3_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
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buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck4_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
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buck_init);
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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@ -841,43 +845,49 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
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pdata->buck4_gpiodvs) {
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
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(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
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(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
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(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK2CTRL, 1 << 1,
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(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK3CTRL, 1 << 1,
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(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK4CTRL, 1 << 1,
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(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
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}
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/* Initialize GPIO DVS registers */
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
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s5m8767->buck2_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK2DVS1 + i,
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s5m8767->buck2_vol[i]);
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}
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if (s5m8767->buck3_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
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s5m8767->buck3_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK3DVS1 + i,
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s5m8767->buck3_vol[i]);
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}
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if (s5m8767->buck4_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
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s5m8767->buck4_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK4DVS1 + i,
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s5m8767->buck4_vol[i]);
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}
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}
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if (s5m8767->buck2_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_DVSRAMP, 0x08, 0x08);
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if (s5m8767->buck3_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_DVSRAMP, 0x04, 0x04);
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if (s5m8767->buck4_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_DVSRAMP, 0x02, 0x02);
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if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
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|| s5m8767->buck4_ramp) {
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@ -901,9 +911,10 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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default:
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val = S5M8767_DVS_BUCK_RAMP_10;
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}
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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val << S5M8767_DVS_BUCK_RAMP_SHIFT,
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S5M8767_DVS_BUCK_RAMP_MASK);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_DVSRAMP,
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S5M8767_DVS_BUCK_RAMP_MASK,
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val << S5M8767_DVS_BUCK_RAMP_SHIFT);
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}
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for (i = 0; i < pdata->num_regulators; i++) {
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