ath11k: add support for WCN6855 hw2.1
Ath11k fails to probe WCN6855 hw2.1 chip:
[ 6.983821] ath11k_pci 0000:06:00.0: enabling device (0000 -> 0002)
[ 6.983841] ath11k_pci 0000:06:00.0: Unsupported WCN6855 SOC hardware version: 18 17
This is caused by the wrong bit mask setting of hardware major version:
for QCA6390/QCN6855, it should be BIT8-11, not BIT8-16, so change the
definition to GENMASK(11, 8).
Also, add a separate entry for WCN6855 hw2.1 in ath11k_hw_params.
Please note that currently WCN6855 hw2.1 shares the same firmwares
as hw2.0, so users of this chip need to create a symlink as below:
ln -s hw2.0 hw2.1
Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1
Fixes: 18ac1665e7 ("ath11k: pci: check TCSR_SOC_HW_VERSION")
Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20211129025613.21594-1-quic_bqiang@quicinc.com
This commit is contained in:
committed by
Kalle Valo
parent
7f3a6f5dd2
commit
d1147a316b
@@ -284,6 +284,59 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.max_fft_bins = 0,
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.max_fft_bins = 0,
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},
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},
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.interface_modes = BIT(NL80211_IFTYPE_STATION) |
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BIT(NL80211_IFTYPE_AP),
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.supports_monitor = false,
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.supports_shadow_regs = true,
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.idle_ps = true,
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.supports_sta_ps = true,
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.cold_boot_calib = false,
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.supports_suspend = true,
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.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
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.fix_l1ss = false,
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.credit_flow = true,
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.max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
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.hal_params = &ath11k_hw_hal_params_qca6390,
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.supports_dynamic_smps_6ghz = false,
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.alloc_cacheable_memory = false,
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.wakeup_mhi = true,
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},
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{
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.name = "wcn6855 hw2.1",
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.hw_rev = ATH11K_HW_WCN6855_HW21,
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.fw = {
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.dir = "WCN6855/hw2.1",
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.board_size = 256 * 1024,
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.cal_offset = 128 * 1024,
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},
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.max_radios = 3,
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.bdf_addr = 0x4B0C0000,
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.hw_ops = &wcn6855_ops,
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.ring_mask = &ath11k_hw_ring_mask_qca6390,
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.internal_sleep_clock = true,
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.regs = &wcn6855_regs,
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.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
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.host_ce_config = ath11k_host_ce_config_qca6390,
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.ce_count = 9,
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.target_ce_config = ath11k_target_ce_config_wlan_qca6390,
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.target_ce_count = 9,
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.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
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.svc_to_ce_map_len = 14,
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.single_pdev_only = true,
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.rxdma1_enable = false,
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.num_rxmda_per_pdev = 2,
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.rx_mac_buf_ring = true,
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.vdev_start_delay = true,
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.htt_peer_map_v2 = false,
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.spectral = {
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.fft_sz = 0,
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.fft_pad_sz = 0,
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.summary_pad_sz = 0,
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.fft_hdr_len = 0,
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.max_fft_bins = 0,
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},
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.interface_modes = BIT(NL80211_IFTYPE_STATION) |
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.interface_modes = BIT(NL80211_IFTYPE_STATION) |
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BIT(NL80211_IFTYPE_AP),
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BIT(NL80211_IFTYPE_AP),
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.supports_monitor = false,
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.supports_monitor = false,
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@@ -117,6 +117,7 @@ enum ath11k_hw_rev {
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ATH11K_HW_IPQ6018_HW10,
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ATH11K_HW_IPQ6018_HW10,
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ATH11K_HW_QCN9074_HW10,
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ATH11K_HW_QCN9074_HW10,
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ATH11K_HW_WCN6855_HW20,
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ATH11K_HW_WCN6855_HW20,
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ATH11K_HW_WCN6855_HW21,
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};
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};
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enum ath11k_firmware_mode {
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enum ath11k_firmware_mode {
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@@ -366,6 +366,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)
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break;
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break;
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case ATH11K_HW_QCA6390_HW20:
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case ATH11K_HW_QCA6390_HW20:
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case ATH11K_HW_WCN6855_HW20:
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case ATH11K_HW_WCN6855_HW20:
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case ATH11K_HW_WCN6855_HW21:
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ath11k_mhi_config = &ath11k_mhi_config_qca6390;
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ath11k_mhi_config = &ath11k_mhi_config_qca6390;
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break;
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break;
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default:
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default:
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@@ -26,7 +26,7 @@
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#define WINDOW_RANGE_MASK GENMASK(18, 0)
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#define WINDOW_RANGE_MASK GENMASK(18, 0)
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#define TCSR_SOC_HW_VERSION 0x0224
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#define TCSR_SOC_HW_VERSION 0x0224
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#define TCSR_SOC_HW_VERSION_MAJOR_MASK GENMASK(16, 8)
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#define TCSR_SOC_HW_VERSION_MAJOR_MASK GENMASK(11, 8)
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#define TCSR_SOC_HW_VERSION_MINOR_MASK GENMASK(7, 0)
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#define TCSR_SOC_HW_VERSION_MINOR_MASK GENMASK(7, 0)
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/* BAR0 + 4k is always accessible, and no
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/* BAR0 + 4k is always accessible, and no
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@@ -1409,9 +1409,21 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
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&soc_hw_version_minor);
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&soc_hw_version_minor);
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switch (soc_hw_version_major) {
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switch (soc_hw_version_major) {
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case 2:
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case 2:
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ab->hw_rev = ATH11K_HW_WCN6855_HW20;
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switch (soc_hw_version_minor) {
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case 0x00:
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case 0x01:
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ab->hw_rev = ATH11K_HW_WCN6855_HW20;
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break;
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case 0x10:
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case 0x11:
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ab->hw_rev = ATH11K_HW_WCN6855_HW21;
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break;
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default:
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goto unsupported_wcn6855_soc;
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}
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break;
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break;
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default:
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default:
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unsupported_wcn6855_soc:
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dev_err(&pdev->dev, "Unsupported WCN6855 SOC hardware version: %d %d\n",
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dev_err(&pdev->dev, "Unsupported WCN6855 SOC hardware version: %d %d\n",
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soc_hw_version_major, soc_hw_version_minor);
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soc_hw_version_major, soc_hw_version_minor);
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ret = -EOPNOTSUPP;
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ret = -EOPNOTSUPP;
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