ASoC: SOF: Intel: add namespace for HDA_COMMON

Define namespace and include it in PCI top-level module.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191217202231.18259-6-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Pierre-Louis Bossart
2019-12-17 14:22:28 -06:00
committed by Mark Brown
parent 1fa44098b6
commit cf5629e459
3 changed files with 9 additions and 8 deletions

View File

@@ -112,7 +112,7 @@ const struct snd_sof_dsp_ops sof_apl_ops = {
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
}; };
EXPORT_SYMBOL(sof_apl_ops); EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc apl_chip_info = { const struct sof_intel_dsp_desc apl_chip_info = {
/* Apollolake */ /* Apollolake */
@@ -128,4 +128,4 @@ const struct sof_intel_dsp_desc apl_chip_info = {
.ssp_count = APL_SSP_COUNT, .ssp_count = APL_SSP_COUNT,
.ssp_base_offset = APL_SSP_BASE_OFFSET, .ssp_base_offset = APL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(apl_chip_info); EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);

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@@ -298,7 +298,7 @@ const struct snd_sof_dsp_ops sof_cnl_ops = {
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
}; };
EXPORT_SYMBOL(sof_cnl_ops); EXPORT_SYMBOL_NS(sof_cnl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc cnl_chip_info = { const struct sof_intel_dsp_desc cnl_chip_info = {
/* Cannonlake */ /* Cannonlake */
@@ -317,7 +317,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
.ssp_count = CNL_SSP_COUNT, .ssp_count = CNL_SSP_COUNT,
.ssp_base_offset = CNL_SSP_BASE_OFFSET, .ssp_base_offset = CNL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(cnl_chip_info); EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc icl_chip_info = { const struct sof_intel_dsp_desc icl_chip_info = {
/* Icelake */ /* Icelake */
@@ -336,7 +336,7 @@ const struct sof_intel_dsp_desc icl_chip_info = {
.ssp_count = ICL_SSP_COUNT, .ssp_count = ICL_SSP_COUNT,
.ssp_base_offset = CNL_SSP_BASE_OFFSET, .ssp_base_offset = CNL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(icl_chip_info); EXPORT_SYMBOL_NS(icl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc tgl_chip_info = { const struct sof_intel_dsp_desc tgl_chip_info = {
/* Tigerlake */ /* Tigerlake */
@@ -352,7 +352,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
.ssp_count = ICL_SSP_COUNT, .ssp_count = ICL_SSP_COUNT,
.ssp_base_offset = CNL_SSP_BASE_OFFSET, .ssp_base_offset = CNL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(tgl_chip_info); EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc ehl_chip_info = { const struct sof_intel_dsp_desc ehl_chip_info = {
/* Elkhartlake */ /* Elkhartlake */
@@ -368,7 +368,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
.ssp_count = ICL_SSP_COUNT, .ssp_count = ICL_SSP_COUNT,
.ssp_base_offset = CNL_SSP_BASE_OFFSET, .ssp_base_offset = CNL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(ehl_chip_info); EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
const struct sof_intel_dsp_desc jsl_chip_info = { const struct sof_intel_dsp_desc jsl_chip_info = {
/* Jasperlake */ /* Jasperlake */
@@ -385,4 +385,4 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
.ssp_count = ICL_SSP_COUNT, .ssp_count = ICL_SSP_COUNT,
.ssp_base_offset = CNL_SSP_BASE_OFFSET, .ssp_base_offset = CNL_SSP_BASE_OFFSET,
}; };
EXPORT_SYMBOL(jsl_chip_info); EXPORT_SYMBOL_NS(jsl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);

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@@ -416,3 +416,4 @@ module_pci_driver(snd_sof_pci_driver);
MODULE_LICENSE("Dual BSD/GPL"); MODULE_LICENSE("Dual BSD/GPL");
MODULE_IMPORT_NS(SND_SOC_SOF_MERRIFIELD); MODULE_IMPORT_NS(SND_SOC_SOF_MERRIFIELD);
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);