forked from Minki/linux
mailbox: bcm-pdc: Remove unnecessary void* casts
Remove unnecessary void* casts in register writes. Fix two other minor formatting issues. Signed-off-by: Rob Rice <rob.rice@broadcom.com> Reviewed-by: Andy Gospodarek <gospo@broadcom.com> Reviewed-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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@ -683,7 +683,7 @@ pdc_receive(struct pdc_state *pdcs)
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/* read last_rx_curr from register once */
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pdcs->last_rx_curr =
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(ioread32((void *)&pdcs->rxregs_64->status0) &
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(ioread32(&pdcs->rxregs_64->status0) &
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CRYPTO_D64_RS0_CD_MASK) / RING_ENTRY_SIZE;
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do {
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@ -793,8 +793,8 @@ static int pdc_tx_list_final(struct pdc_state *pdcs)
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* before chip starts to process new request
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*/
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wmb();
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iowrite32(pdcs->rxout << 4, (void *)&pdcs->rxregs_64->ptr);
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iowrite32(pdcs->txout << 4, (void *)&pdcs->txregs_64->ptr);
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iowrite32(pdcs->rxout << 4, &pdcs->rxregs_64->ptr);
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iowrite32(pdcs->txout << 4, &pdcs->txregs_64->ptr);
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pdcs->pdc_requests++;
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return PDC_SUCCESS;
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@ -1034,47 +1034,46 @@ static int pdc_ring_init(struct pdc_state *pdcs, int ringset)
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/* But first disable DMA and set curptr to 0 for both TX & RX */
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iowrite32(PDC_TX_CTL, &dma_reg->dmaxmt.control);
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iowrite32((PDC_RX_CTL + (pdcs->rx_status_len << 1)),
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(void *)&dma_reg->dmarcv.control);
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iowrite32(0, (void *)&dma_reg->dmaxmt.ptr);
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iowrite32(0, (void *)&dma_reg->dmarcv.ptr);
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&dma_reg->dmarcv.control);
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iowrite32(0, &dma_reg->dmaxmt.ptr);
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iowrite32(0, &dma_reg->dmarcv.ptr);
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/* Set base DMA addresses */
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iowrite32(lower_32_bits(pdcs->tx_ring_alloc.dmabase),
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(void *)&dma_reg->dmaxmt.addrlow);
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&dma_reg->dmaxmt.addrlow);
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iowrite32(upper_32_bits(pdcs->tx_ring_alloc.dmabase),
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(void *)&dma_reg->dmaxmt.addrhigh);
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&dma_reg->dmaxmt.addrhigh);
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iowrite32(lower_32_bits(pdcs->rx_ring_alloc.dmabase),
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(void *)&dma_reg->dmarcv.addrlow);
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&dma_reg->dmarcv.addrlow);
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iowrite32(upper_32_bits(pdcs->rx_ring_alloc.dmabase),
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(void *)&dma_reg->dmarcv.addrhigh);
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&dma_reg->dmarcv.addrhigh);
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/* Re-enable DMA */
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iowrite32(PDC_TX_CTL | PDC_TX_ENABLE, &dma_reg->dmaxmt.control);
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iowrite32((PDC_RX_CTL | PDC_RX_ENABLE | (pdcs->rx_status_len << 1)),
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(void *)&dma_reg->dmarcv.control);
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&dma_reg->dmarcv.control);
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/* Initialize descriptors */
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for (i = 0; i < PDC_RING_ENTRIES; i++) {
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/* Every tx descriptor can be used for start of frame. */
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if (i != pdcs->ntxpost) {
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iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOF,
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(void *)&pdcs->txd_64[i].ctrl1);
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&pdcs->txd_64[i].ctrl1);
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} else {
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/* Last descriptor in ringset. Set End of Table. */
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iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOF |
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D64_CTRL1_EOT,
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(void *)&pdcs->txd_64[i].ctrl1);
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D64_CTRL1_EOT, &pdcs->txd_64[i].ctrl1);
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}
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/* Every rx descriptor can be used for start of frame */
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if (i != pdcs->nrxpost) {
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iowrite32(D64_CTRL1_SOF,
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(void *)&pdcs->rxd_64[i].ctrl1);
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&pdcs->rxd_64[i].ctrl1);
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} else {
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/* Last descriptor in ringset. Set End of Table. */
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iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOT,
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(void *)&pdcs->rxd_64[i].ctrl1);
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&pdcs->rxd_64[i].ctrl1);
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}
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}
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return PDC_SUCCESS;
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@ -1300,10 +1299,10 @@ void pdc_hw_init(struct pdc_state *pdcs)
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/* initialize data structures */
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pdcs->regs = (struct pdc_regs *)pdcs->pdc_reg_vbase;
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pdcs->txregs_64 = (struct dma64_regs *)
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(void *)(((u8 *)pdcs->pdc_reg_vbase) +
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(((u8 *)pdcs->pdc_reg_vbase) +
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PDC_TXREGS_OFFSET + (sizeof(struct dma64) * ringset));
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pdcs->rxregs_64 = (struct dma64_regs *)
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(void *)(((u8 *)pdcs->pdc_reg_vbase) +
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(((u8 *)pdcs->pdc_reg_vbase) +
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PDC_RXREGS_OFFSET + (sizeof(struct dma64) * ringset));
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pdcs->ntxd = PDC_RING_ENTRIES;
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@ -1318,7 +1317,7 @@ void pdc_hw_init(struct pdc_state *pdcs)
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iowrite32(PDC_TX_CTL, &dma_reg->dmaxmt.control);
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iowrite32(PDC_RX_CTL + (pdcs->rx_status_len << 1),
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(void *)&dma_reg->dmarcv.control);
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&dma_reg->dmarcv.control);
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/* Reset current index pointers after making sure DMA is disabled */
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iowrite32(0, &dma_reg->dmaxmt.ptr);
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