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ARM: dts: qcom: sdx65: Add support for APCS block

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The APCS block on SDX65 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1645505785-2271-5-git-send-email-quic_rohiagar@quicinc.com
This commit is contained in:
Rohit Agarwal
2022-02-22 10:26:24 +05:30
committed by Bjorn Andersson
parent 02c5553523
commit ce91bc005e
1 changed files with 9 additions and 0 deletions
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9
arch/arm/boot/dts/qcom-sdx65.dtsi
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@@ -129,6 +129,15 @@
#clock-cells = <0>; #clock-cells = <0>;
}; };
apcs: mailbox@17810000 {
compatible = "qcom,sdx55-apcs-gcc", "syscon";
reg = <0x17810000 0x2000>;
#mbox-cells = <1>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
clock-names = "ref", "pll", "aux";
#clock-cells = <0>;
};
timer@17820000 { timer@17820000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;