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drm/amdgpu/VCN2: expose rings functions

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They can be reused by VCN2.x family

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Liu
2019-07-09 10:04:39 -05:00
committed by Alex Deucher
parent 22a8f44286
commit cdbd115eaf
2 changed files with 79 additions and 46 deletions
Download Patch File Download Diff File Expand all files Collapse all files

55
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
View File

@@ -1490,7 +1490,7 @@ static void vcn_v2_0_dec_ring_set_wptr(struct amdgpu_ring *ring)
* *
* Write a start command to the ring. * Write a start command to the ring.
*/ */
static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring) void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
@@ -1507,7 +1507,7 @@ static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
* *
* Write a end command to the ring. * Write a end command to the ring.
*/ */
static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring) void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
@@ -1522,7 +1522,7 @@ static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
* *
* Write a nop command to the ring. * Write a nop command to the ring.
*/ */
static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
int i; int i;
@@ -1543,7 +1543,7 @@ static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t coun
* *
* Write a fence and a trap command to the ring. * Write a fence and a trap command to the ring.
*/ */
static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags) unsigned flags)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
@@ -1580,7 +1580,7 @@ static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
* *
* Write ring commands to execute the indirect buffer * Write ring commands to execute the indirect buffer
*/ */
static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
struct amdgpu_job *job, struct amdgpu_job *job,
struct amdgpu_ib *ib, struct amdgpu_ib *ib,
uint32_t flags) uint32_t flags)
@@ -1599,9 +1599,8 @@ static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, ib->length_dw); amdgpu_ring_write(ring, ib->length_dw);
} }
static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t reg, uint32_t val, uint32_t val, uint32_t mask)
uint32_t mask)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
@@ -1619,7 +1618,7 @@ static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1); amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);
} }
static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned vmid, uint64_t pd_addr) unsigned vmid, uint64_t pd_addr)
{ {
struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
@@ -1634,7 +1633,7 @@ static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
vcn_v2_0_dec_ring_emit_reg_wait(ring, data0, data1, mask); vcn_v2_0_dec_ring_emit_reg_wait(ring, data0, data1, mask);
} }
static void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
uint32_t reg, uint32_t val) uint32_t reg, uint32_t val)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
@@ -1727,7 +1726,7 @@ static void vcn_v2_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
* *
* Write enc a fence and a trap command to the ring. * Write enc a fence and a trap command to the ring.
*/ */
static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags) u64 seq, unsigned flags)
{ {
WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT); WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
@@ -1739,7 +1738,7 @@ static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP); amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);
} }
static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring) void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
{ {
amdgpu_ring_write(ring, VCN_ENC_CMD_END); amdgpu_ring_write(ring, VCN_ENC_CMD_END);
} }
@@ -1752,7 +1751,7 @@ static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
* *
* Write enc ring commands to execute the indirect buffer * Write enc ring commands to execute the indirect buffer
*/ */
static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring, void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
struct amdgpu_job *job, struct amdgpu_job *job,
struct amdgpu_ib *ib, struct amdgpu_ib *ib,
uint32_t flags) uint32_t flags)
@@ -1766,9 +1765,8 @@ static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, ib->length_dw); amdgpu_ring_write(ring, ib->length_dw);
} }
static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t reg, uint32_t val, uint32_t val, uint32_t mask)
uint32_t mask)
{ {
amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT); amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);
amdgpu_ring_write(ring, reg << 2); amdgpu_ring_write(ring, reg << 2);
@@ -1776,7 +1774,7 @@ static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, val); amdgpu_ring_write(ring, val);
} }
static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring, void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned int vmid, uint64_t pd_addr) unsigned int vmid, uint64_t pd_addr)
{ {
struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
@@ -1788,8 +1786,7 @@ static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
lower_32_bits(pd_addr), 0xffffffff); lower_32_bits(pd_addr), 0xffffffff);
} }
static void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
uint32_t reg, uint32_t val)
{ {
amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE); amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);
amdgpu_ring_write(ring, reg << 2); amdgpu_ring_write(ring, reg << 2);
@@ -1853,7 +1850,7 @@ static void vcn_v2_0_jpeg_ring_set_wptr(struct amdgpu_ring *ring)
* *
* Write a start command to the ring. * Write a start command to the ring.
*/ */
static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring) void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
{ {
amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0)); 0, 0, PACKETJ_TYPE0));
@@ -1871,7 +1868,7 @@ static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
* *
* Write a end command to the ring. * Write a end command to the ring.
*/ */
static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring) void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
{ {
amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0)); 0, 0, PACKETJ_TYPE0));
@@ -1890,7 +1887,7 @@ static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
* *
* Write a fence and a trap command to the ring. * Write a fence and a trap command to the ring.
*/ */
static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags) unsigned flags)
{ {
WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT); WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
@@ -1939,7 +1936,7 @@ static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
* *
* Write ring commands to execute the indirect buffer. * Write ring commands to execute the indirect buffer.
*/ */
static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring, void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
struct amdgpu_job *job, struct amdgpu_job *job,
struct amdgpu_ib *ib, struct amdgpu_ib *ib,
uint32_t flags) uint32_t flags)
@@ -1990,9 +1987,8 @@ static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, 0x2); amdgpu_ring_write(ring, 0x2);
} }
static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t reg, uint32_t val, uint32_t val, uint32_t mask)
uint32_t mask)
{ {
uint32_t reg_offset = (reg << 2); uint32_t reg_offset = (reg << 2);
@@ -2018,7 +2014,7 @@ static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, mask); amdgpu_ring_write(ring, mask);
} }
static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring, void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned vmid, uint64_t pd_addr) unsigned vmid, uint64_t pd_addr)
{ {
struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
@@ -2033,8 +2029,7 @@ static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
vcn_v2_0_jpeg_ring_emit_reg_wait(ring, data0, data1, mask); vcn_v2_0_jpeg_ring_emit_reg_wait(ring, data0, data1, mask);
} }
static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
uint32_t reg, uint32_t val)
{ {
uint32_t reg_offset = (reg << 2); uint32_t reg_offset = (reg << 2);
@@ -2052,7 +2047,7 @@ static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, val); amdgpu_ring_write(ring, val);
} }
static void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count) void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)
{ {
int i; int i;

38
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h
View File

@@ -24,6 +24,44 @@
#ifndef __VCN_V2_0_H__ #ifndef __VCN_V2_0_H__
#define __VCN_V2_0_H__ #define __VCN_V2_0_H__
extern void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring);
extern void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring);
extern void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
extern void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags);
extern void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
struct amdgpu_ib *ib, uint32_t flags);
extern void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t val, uint32_t mask);
extern void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned vmid, uint64_t pd_addr);
extern void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
uint32_t reg, uint32_t val);
extern void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring);
extern void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags);
extern void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
struct amdgpu_ib *ib, uint32_t flags);
extern void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t val, uint32_t mask);
extern void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned int vmid, uint64_t pd_addr);
extern void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
extern void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring);
extern void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring);
extern void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
unsigned flags);
extern void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
struct amdgpu_ib *ib, uint32_t flags);
extern void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
uint32_t val, uint32_t mask);
extern void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned vmid, uint64_t pd_addr);
extern void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
extern void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count);
extern const struct amdgpu_ip_block_version vcn_v2_0_ip_block; extern const struct amdgpu_ip_block_version vcn_v2_0_ip_block;
#endif /* __VCN_V2_0_H__ */ #endif /* __VCN_V2_0_H__ */