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cxl: Add preliminary workaround for CX4 interrupt limitation

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The Mellanox CX4 has a hardware limitation where only 4 bits of the
AFU interrupt number can be passed to the XSL when sending an interrupt,
limiting it to only 15 interrupts per context (AFU interrupt number 0 is
invalid).

In order to overcome this, we will allocate additional contexts linked
to the default context as extra address space for the extra interrupts -
this will be implemented in the next patch.

This patch adds the preliminary support to allow this, by way of adding
a linked list in the context structure that we use to keep track of the
contexts dedicated to interrupts, and an API to simultaneously iterate
over the related context structures, AFU interrupt numbers and hardware
interrupt numbers. The point of using a single API to iterate these is
to hide some of the details of the iteration from external code, and to
reduce the number of APIs that need to be exported via base.c to allow
built in code to call.

Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Ian Munsie
2016-07-14 07:17:09 +10:00
committed by Michael Ellerman
parent 79384e4b71
commit cbce0917e2
6 changed files with 53 additions and 0 deletions
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17
drivers/misc/cxl/base.c
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@@ -141,6 +141,23 @@ void cxl_pci_disable_device(struct pci_dev *dev)
}
EXPORT_SYMBOL_GPL(cxl_pci_disable_device);
int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq)
{
int ret;
struct cxl_calls *calls;
calls = cxl_calls_get();
if (!calls)
return -EBUSY;
ret = calls->cxl_next_msi_hwirq(pdev, ctx, afu_irq);
cxl_calls_put(calls);
return ret;
}
EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
static int __init cxl_base_init(void)
{
struct device_node *np;