forked from Minki/linux
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
This commit is contained in:
Tony Prisk
parent
55d512e245
commit
cb935e7157
36
arch/arm/boot/dts/vt8500-bv07.dts
Normal file
36
arch/arm/boot/dts/vt8500-bv07.dts
Normal file
@ -0,0 +1,36 @@
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/*
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* vt8500-bv07.dts - Device tree file for Benign BV07 Netbook
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/dts-v1/;
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/include/ "vt8500.dtsi"
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/ {
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model = "Benign BV07 Netbook";
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/*
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* Display node is based on Sascha Hauer's patch on dri-devel.
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* Added a bpp property to calculate the size of the framebuffer
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* until the binding is formalized.
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*/
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display: display@0 {
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modes {
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mode0: mode@0 {
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hactive = <800>;
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vactive = <480>;
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hback-porch = <88>;
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hfront-porch = <40>;
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hsync-len = <0>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <1>;
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clock = <0>; /* unused but required */
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bpp = <16>; /* non-standard but required */
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};
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};
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};
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};
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116
arch/arm/boot/dts/vt8500.dtsi
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116
arch/arm/boot/dts/vt8500.dtsi
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@ -0,0 +1,116 @@
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/*
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* vt8500.dtsi - Device tree file for VIA VT8500 SoC
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "via,vt8500";
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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interrupt-parent = <&intc>;
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intc: interrupt-controller@d8140000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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reg = <0xd8140000 0x10000>;
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#interrupt-cells = <1>;
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};
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gpio: gpio-controller@d8110000 {
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compatible = "via,vt8500-gpio";
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gpio-controller;
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reg = <0xd8110000 0x10000>;
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#gpio-cells = <3>;
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};
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pmc@d8130000 {
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compatible = "via,vt8500-pmc";
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reg = <0xd8130000 0x1000>;
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ref24: ref24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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};
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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};
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ehci@d8007900 {
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compatible = "via,vt8500-ehci";
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reg = <0xd8007900 0x200>;
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interrupts = <43>;
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};
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uhci@d8007b00 {
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compatible = "platform-uhci";
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reg = <0xd8007b00 0x200>;
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interrupts = <43>;
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};
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fb@d800e400 {
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compatible = "via,vt8500-fb";
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reg = <0xd800e400 0x400>;
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interrupts = <12>;
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display = <&display>;
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default-mode = <&mode0>;
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};
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ge_rops@d8050400 {
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compatible = "wm,prizm-ge-rops";
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reg = <0xd8050400 0x100>;
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};
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uart@d8200000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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};
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uart@d8210000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8210000 0x1040>;
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interrupts = <47>;
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clocks = <&ref24>;
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};
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uart@d82c0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82c0000 0x1040>;
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interrupts = <50>;
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clocks = <&ref24>;
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};
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rtc@d8100000 {
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compatible = "via,vt8500-rtc";
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reg = <0xd8100000 0x10000>;
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interrupts = <48>;
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};
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};
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};
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36
arch/arm/boot/dts/wm8505-ref.dts
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36
arch/arm/boot/dts/wm8505-ref.dts
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@ -0,0 +1,36 @@
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/*
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* wm8505-ref.dts - Device tree file for Wondermedia WM8505 reference netbook
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/dts-v1/;
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/include/ "wm8505.dtsi"
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/ {
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model = "Wondermedia WM8505 Netbook";
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/*
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* Display node is based on Sascha Hauer's patch on dri-devel.
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* Added a bpp property to calculate the size of the framebuffer
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* until the binding is formalized.
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*/
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display: display@0 {
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modes {
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mode0: mode@0 {
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hactive = <800>;
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vactive = <480>;
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hback-porch = <88>;
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hfront-porch = <40>;
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hsync-len = <0>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <1>;
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clock = <0>; /* unused but required */
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bpp = <32>; /* non-standard but required */
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};
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};
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};
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};
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143
arch/arm/boot/dts/wm8505.dtsi
Normal file
143
arch/arm/boot/dts/wm8505.dtsi
Normal file
@ -0,0 +1,143 @@
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/*
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* wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "wm,wm8505";
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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interrupt-parent = <&intc0>;
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intc0: interrupt-controller@d8140000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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reg = <0xd8140000 0x10000>;
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#interrupt-cells = <1>;
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};
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/* Secondary IC cascaded to intc0 */
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intc1: interrupt-controller@d8150000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xD8150000 0x10000>;
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interrupts = <56 57 58 59 60 61 62 63>;
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};
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gpio: gpio-controller@d8110000 {
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compatible = "wm,wm8505-gpio";
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gpio-controller;
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reg = <0xd8110000 0x10000>;
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#gpio-cells = <3>;
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};
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pmc@d8130000 {
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compatible = "via,vt8500-pmc";
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reg = <0xd8130000 0x1000>;
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ref24: ref24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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};
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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};
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ehci@d8007100 {
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compatible = "via,vt8500-ehci";
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reg = <0xd8007100 0x200>;
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interrupts = <43>;
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};
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uhci@d8007300 {
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compatible = "platform-uhci";
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reg = <0xd8007300 0x200>;
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interrupts = <43>;
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};
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fb@d8050800 {
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compatible = "wm,wm8505-fb";
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reg = <0xd8050800 0x200>;
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display = <&display>;
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default-mode = <&mode0>;
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};
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ge_rops@d8050400 {
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compatible = "wm,prizm-ge-rops";
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reg = <0xd8050400 0x100>;
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};
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uart@d8200000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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};
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uart@d8210000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8210000 0x1040>;
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interrupts = <47>;
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clocks = <&ref24>;
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};
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uart@d82c0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82c0000 0x1040>;
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interrupts = <50>;
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clocks = <&ref24>;
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};
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uart@d8370000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8370000 0x1040>;
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interrupts = <31>;
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clocks = <&ref24>;
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};
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uart@d8380000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8380000 0x1040>;
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interrupts = <30>;
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clocks = <&ref24>;
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};
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rtc@d8100000 {
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compatible = "via,vt8500-rtc";
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reg = <0xd8100000 0x10000>;
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interrupts = <48>;
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};
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};
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};
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36
arch/arm/boot/dts/wm8650-mid.dts
Normal file
36
arch/arm/boot/dts/wm8650-mid.dts
Normal file
@ -0,0 +1,36 @@
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/*
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* wm8650-mid.dts - Device tree file for Wondermedia WM8650-MID Tablet
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/dts-v1/;
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/include/ "wm8650.dtsi"
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/ {
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model = "Wondermedia WM8650-MID Tablet";
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/*
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* Display node is based on Sascha Hauer's patch on dri-devel.
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* Added a bpp property to calculate the size of the framebuffer
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* until the binding is formalized.
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*/
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display: display@0 {
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modes {
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mode0: mode@0 {
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hactive = <800>;
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vactive = <480>;
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hback-porch = <88>;
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hfront-porch = <40>;
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hsync-len = <0>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <1>;
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clock = <0>; /* unused but required */
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bpp = <16>; /* non-standard but required */
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};
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};
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};
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};
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147
arch/arm/boot/dts/wm8650.dtsi
Normal file
147
arch/arm/boot/dts/wm8650.dtsi
Normal file
@ -0,0 +1,147 @@
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/*
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* wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* Licensed under GPLv2 or later
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "wm,wm8650";
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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interrupt-parent = <&intc0>;
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intc0: interrupt-controller@d8140000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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reg = <0xd8140000 0x10000>;
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#interrupt-cells = <1>;
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};
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/* Secondary IC cascaded to intc0 */
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intc1: interrupt-controller@d8150000 {
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compatible = "via,vt8500-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xD8150000 0x10000>;
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interrupts = <56 57 58 59 60 61 62 63>;
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};
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gpio: gpio-controller@d8110000 {
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compatible = "wm,wm8650-gpio";
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gpio-controller;
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reg = <0xd8110000 0x10000>;
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#gpio-cells = <3>;
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};
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pmc@d8130000 {
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compatible = "via,vt8500-pmc";
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reg = <0xd8130000 0x1000>;
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ref25: ref25M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <25000000>;
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};
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ref24: ref24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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plla: plla {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x200>;
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};
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pllb: pllb {
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#clock-cells = <0>;
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compatible = "wm,wm8650-pll-clock";
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clocks = <&ref25>;
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reg = <0x204>;
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};
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arm: arm {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&plla>;
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divisor-reg = <0x300>;
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};
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sdhc: sdhc {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&pllb>;
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divisor-reg = <0x328>;
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divisor-mask = <0x3f>;
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enable-reg = <0x254>;
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enable-bit = <18>;
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};
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};
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};
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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};
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ehci@d8007900 {
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compatible = "via,vt8500-ehci";
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reg = <0xd8007900 0x200>;
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interrupts = <43>;
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};
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uhci@d8007b00 {
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compatible = "platform-uhci";
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reg = <0xd8007b00 0x200>;
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interrupts = <43>;
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};
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fb@d8050800 {
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compatible = "wm,wm8505-fb";
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reg = <0xd8050800 0x200>;
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display = <&display>;
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default-mode = <&mode0>;
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};
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ge_rops@d8050400 {
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compatible = "wm,prizm-ge-rops";
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reg = <0xd8050400 0x100>;
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};
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uart@d8200000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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};
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rtc@d8100000 {
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compatible = "via,vt8500-rtc";
|
||||
reg = <0xd8100000 0x10000>;
|
||||
interrupts = <48>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user