forked from Minki/linux
[PATCH] powerpc: Fix runlatch performance issues
The runlatch SPR can take a lot of time to write. My original runlatch code would set it on every exception entry even though most of the time this was not required. It would also continually set it in the idle loop, which is an issue on an SMT capable processor. Now we cache the runlatch value in a threadinfo bit, and only check for it in decrementer and hardware interrupt exceptions as well as the idle loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -319,7 +319,6 @@ exception_marker:
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label##_pSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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RUNLATCH_ON(r13); \
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EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
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#define STD_EXCEPTION_ISERIES(n, label, area) \
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@ -327,7 +326,6 @@ label##_pSeries: \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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RUNLATCH_ON(r13); \
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EXCEPTION_PROLOG_ISERIES_1(area); \
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EXCEPTION_PROLOG_ISERIES_2; \
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b label##_common
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@ -337,7 +335,6 @@ label##_iSeries: \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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RUNLATCH_ON(r13); \
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \
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lbz r10,PACAPROCENABLED(r13); \
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cmpwi 0,r10,0; \
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@ -390,6 +387,7 @@ label##_common: \
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label##_common: \
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EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
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DISABLE_INTS; \
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bl .ppc64_runlatch_on; \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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bl hdlr; \
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b .ret_from_except_lite
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@ -407,7 +405,6 @@ __start_interrupts:
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_machine_check_pSeries:
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HMT_MEDIUM
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mtspr SPRN_SPRG1,r13 /* save r13 */
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RUNLATCH_ON(r13)
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EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
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. = 0x300
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@ -434,7 +431,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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data_access_slb_pSeries:
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HMT_MEDIUM
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mtspr SPRN_SPRG1,r13
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RUNLATCH_ON(r13)
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_DAR
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@ -460,7 +456,6 @@ data_access_slb_pSeries:
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instruction_access_slb_pSeries:
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HMT_MEDIUM
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mtspr SPRN_SPRG1,r13
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RUNLATCH_ON(r13)
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
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@ -491,7 +486,6 @@ instruction_access_slb_pSeries:
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.globl system_call_pSeries
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system_call_pSeries:
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HMT_MEDIUM
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RUNLATCH_ON(r9)
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mr r9,r13
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mfmsr r10
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mfspr r13,SPRN_SPRG3
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@ -575,7 +569,6 @@ slb_miss_user_pseries:
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system_reset_fwnmi:
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HMT_MEDIUM
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mtspr SPRN_SPRG1,r13 /* save r13 */
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RUNLATCH_ON(r13)
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EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
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.globl machine_check_fwnmi
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@ -583,7 +576,6 @@ system_reset_fwnmi:
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machine_check_fwnmi:
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HMT_MEDIUM
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mtspr SPRN_SPRG1,r13 /* save r13 */
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RUNLATCH_ON(r13)
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EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
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#ifdef CONFIG_PPC_ISERIES
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@ -894,7 +886,6 @@ unrecov_fer:
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.align 7
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.globl data_access_common
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data_access_common:
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RUNLATCH_ON(r10) /* It wont fit in the 0x300 handler */
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mfspr r10,SPRN_DAR
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std r10,PACA_EXGEN+EX_DAR(r13)
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mfspr r10,SPRN_DSISR
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@ -1042,6 +1033,7 @@ hardware_interrupt_common:
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EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
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hardware_interrupt_entry:
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DISABLE_INTS
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bl .ppc64_runlatch_on
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .do_IRQ
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b .ret_from_except_lite
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@ -888,3 +888,35 @@ void dump_stack(void)
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show_stack(current, NULL);
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}
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EXPORT_SYMBOL(dump_stack);
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#ifdef CONFIG_PPC64
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void ppc64_runlatch_on(void)
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{
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unsigned long ctrl;
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if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
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HMT_medium();
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ctrl = mfspr(SPRN_CTRLF);
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ctrl |= CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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set_thread_flag(TIF_RUNLATCH);
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}
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}
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void ppc64_runlatch_off(void)
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{
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unsigned long ctrl;
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if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
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HMT_medium();
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clear_thread_flag(TIF_RUNLATCH);
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ctrl = mfspr(SPRN_CTRLF);
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ctrl &= ~CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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}
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}
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#endif
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@ -648,6 +648,7 @@ static void yield_shared_processor(void)
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* here and let the timer_interrupt code sort out the actual time.
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*/
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get_lppaca()->int_dword.fields.decr_int = 1;
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ppc64_runlatch_on();
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process_iSeries_events();
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}
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@ -615,27 +615,9 @@
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#define proc_trap() asm volatile("trap")
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#ifdef CONFIG_PPC64
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static inline void ppc64_runlatch_on(void)
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{
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unsigned long ctrl;
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if (cpu_has_feature(CPU_FTR_CTRL)) {
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ctrl = mfspr(SPRN_CTRLF);
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ctrl |= CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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}
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}
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static inline void ppc64_runlatch_off(void)
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{
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unsigned long ctrl;
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if (cpu_has_feature(CPU_FTR_CTRL)) {
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ctrl = mfspr(SPRN_CTRLF);
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ctrl &= ~CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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}
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}
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extern void ppc64_runlatch_on(void);
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extern void ppc64_runlatch_off(void);
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extern unsigned long scom970_read(unsigned int address);
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extern void scom970_write(unsigned int address, unsigned long value);
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@ -645,15 +627,6 @@ extern void scom970_write(unsigned int address, unsigned long value);
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#define __get_SP() ({unsigned long sp; \
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asm volatile("mr %0,1": "=r" (sp)); sp;})
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#else /* __ASSEMBLY__ */
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#define RUNLATCH_ON(REG) \
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BEGIN_FTR_SECTION \
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mfspr (REG),SPRN_CTRLF; \
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ori (REG),(REG),CTRL_RUNLATCH; \
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mtspr SPRN_CTRLT,(REG); \
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END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_REG_H */
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@ -113,7 +113,7 @@ static inline struct thread_info *current_thread_info(void)
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#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
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TIF_NEED_RESCHED */
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#define TIF_32BIT 5 /* 32 bit binary */
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/* #define SPARE 6 */
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#define TIF_RUNLATCH 6 /* Is the runlatch enabled? */
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#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */
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#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */
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#define TIF_SINGLESTEP 9 /* singlestepping active */
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@ -131,7 +131,7 @@ static inline struct thread_info *current_thread_info(void)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
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#define _TIF_32BIT (1<<TIF_32BIT)
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/* #define _SPARE (1<<SPARE) */
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#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
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#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
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#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
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#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
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