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Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM

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- unify duplicate page_size_table definitions
 - make sure it is placed alongside the other cplb switching code

Pointed-out-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Mike Frysinger 2008-11-18 17:48:22 +08:00 committed by Bryan Wu
parent 05a717fbc8
commit cb15e57cc7
2 changed files with 10 additions and 10 deletions
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13
arch/blackfin/kernel/cplb-nompu/cplbmgr.S
View File

@ -629,15 +629,20 @@ ENTRY(_cplb_mgr)
RTS; RTS;
ENDPROC(_cplb_mgr) ENDPROC(_cplb_mgr)
#ifdef CONFIG_CPLB_SWITCH_TAB_L1
.section .l1.data
#else
.data .data
.align 4; #endif
_page_size_table:
ENTRY(_page_size_table)
.byte4 0x00000400; /* 1K */ .byte4 0x00000400; /* 1K */
.byte4 0x00001000; /* 4K */ .byte4 0x00001000; /* 4K */
.byte4 0x00100000; /* 1M */ .byte4 0x00100000; /* 1M */
.byte4 0x00400000; /* 4M */ .byte4 0x00400000; /* 4M */
END(_page_size_table)
.align 4; ENTRY(_dcplb_preference)
_dcplb_preference:
.byte4 0x00000001; /* valid bit */ .byte4 0x00000001; /* valid bit */
.byte4 0x00000002; /* lock bit */ .byte4 0x00000002; /* lock bit */
END(_dcplb_preference)

7
arch/blackfin/kernel/cplbinfo.c
View File

@ -59,12 +59,7 @@ static char *cplb_print_entry(char *buf, cplb_type type, unsigned int cpu)
#else #else
static int page_size_table[4] = { extern int page_size_table[];
0x00000400, /* 1K */
0x00001000, /* 4K */
0x00100000, /* 1M */
0x00400000 /* 4M */
};
static int cplb_find_entry(unsigned long *cplb_addr, static int cplb_find_entry(unsigned long *cplb_addr,
unsigned long *cplb_data, unsigned long addr, unsigned long *cplb_data, unsigned long addr,