forked from Minki/linux
net/mlx5: EQ, Move all EQ logic to eq.c
Move completion EQs flows from main.c to eq.c, reasons: 1) It is where this logic belongs. 2) It will help centralize the EQ logic in one file for downstream refactoring, and future extensions/updates. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
This commit is contained in:
Saeed Mahameed
Leon Romanovsky
parent
aaa553a644
commit
ca828cb468
@ -820,6 +820,8 @@ void mlx5_eq_cleanup(struct mlx5_core_dev *dev)
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mlx5_eq_debugfs_cleanup(dev);
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}
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/* Async EQs */
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int mlx5_start_eqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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@ -953,12 +955,186 @@ int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
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}
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/* Completion EQs */
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static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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struct mlx5_priv *priv = &mdev->priv;
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int vecidx = MLX5_EQ_VEC_COMP_BASE + i;
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int irq = pci_irq_vector(mdev->pdev, vecidx);
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if (!zalloc_cpumask_var(&priv->irq_info[vecidx].mask, GFP_KERNEL)) {
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mlx5_core_warn(mdev, "zalloc_cpumask_var failed");
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return -ENOMEM;
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}
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cpumask_set_cpu(cpumask_local_spread(i, priv->numa_node),
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priv->irq_info[vecidx].mask);
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if (IS_ENABLED(CONFIG_SMP) &&
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irq_set_affinity_hint(irq, priv->irq_info[vecidx].mask))
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mlx5_core_warn(mdev, "irq_set_affinity_hint failed, irq 0x%.4x", irq);
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return 0;
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}
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static void mlx5_irq_clear_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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int vecidx = MLX5_EQ_VEC_COMP_BASE + i;
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struct mlx5_priv *priv = &mdev->priv;
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int irq = pci_irq_vector(mdev->pdev, vecidx);
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irq_set_affinity_hint(irq, NULL);
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free_cpumask_var(priv->irq_info[vecidx].mask);
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}
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static int mlx5_irq_set_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int err;
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int i;
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for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++) {
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err = mlx5_irq_set_affinity_hint(mdev, i);
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if (err)
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goto err_out;
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}
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return 0;
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err_out:
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for (i--; i >= 0; i--)
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mlx5_irq_clear_affinity_hint(mdev, i);
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return err;
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}
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static void mlx5_irq_clear_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int i;
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for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++)
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mlx5_irq_clear_affinity_hint(mdev, i);
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}
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void mlx5_free_comp_eqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq, *n;
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mlx5_irq_clear_affinity_hints(dev);
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#ifdef CONFIG_RFS_ACCEL
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if (dev->rmap) {
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free_irq_cpu_rmap(dev->rmap);
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dev->rmap = NULL;
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}
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#endif
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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list_del(&eq->list);
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if (mlx5_destroy_unmap_eq(dev, eq))
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mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n",
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eq->eqn);
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kfree(eq);
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}
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}
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int mlx5_alloc_comp_eqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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char name[MLX5_MAX_IRQ_NAME];
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struct mlx5_eq *eq;
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int ncomp_vec;
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int nent;
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int err;
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int i;
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INIT_LIST_HEAD(&table->comp_eqs_list);
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ncomp_vec = table->num_comp_vectors;
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nent = MLX5_COMP_EQ_SIZE;
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#ifdef CONFIG_RFS_ACCEL
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dev->rmap = alloc_irq_cpu_rmap(ncomp_vec);
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if (!dev->rmap)
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return -ENOMEM;
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#endif
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for (i = 0; i < ncomp_vec; i++) {
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int vecidx = i + MLX5_EQ_VEC_COMP_BASE;
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eq = kzalloc(sizeof(*eq), GFP_KERNEL);
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if (!eq) {
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err = -ENOMEM;
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goto clean;
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}
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#ifdef CONFIG_RFS_ACCEL
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irq_cpu_rmap_add(dev->rmap, pci_irq_vector(dev->pdev, vecidx));
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#endif
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snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i);
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err = mlx5_create_map_eq(dev, eq, vecidx, nent, 0,
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name, MLX5_EQ_TYPE_COMP);
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if (err) {
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kfree(eq);
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goto clean;
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}
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mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
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/* add tail, to keep the list ordered, for mlx5_vector2eqn to work */
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list_add_tail(&eq->list, &table->comp_eqs_list);
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}
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err = mlx5_irq_set_affinity_hints(dev);
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if (err) {
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mlx5_core_err(dev, "Failed to alloc affinity hint cpumask\n");
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goto clean;
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}
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return 0;
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clean:
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mlx5_free_comp_eqs(dev);
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return err;
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}
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int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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unsigned int *irqn)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq, *n;
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int err = -ENOENT;
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int i = 0;
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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if (i++ == vector) {
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*eqn = eq->eqn;
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*irqn = eq->irqn;
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err = 0;
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break;
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}
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}
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return err;
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}
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EXPORT_SYMBOL(mlx5_vector2eqn);
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struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq;
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list_for_each_entry(eq, &table->comp_eqs_list, list) {
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if (eq->eqn == eqn)
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return eq;
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}
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return ERR_PTR(-ENOENT);
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}
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/* This function should only be called after mlx5_cmd_force_teardown_hca */
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void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq;
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mlx5_irq_clear_affinity_hints(dev);
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#ifdef CONFIG_RFS_ACCEL
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if (dev->rmap) {
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free_irq_cpu_rmap(dev->rmap);
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@ -637,168 +637,6 @@ u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev)
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return (u64)timer_l | (u64)timer_h1 << 32;
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}
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static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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struct mlx5_priv *priv = &mdev->priv;
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int vecidx = MLX5_EQ_VEC_COMP_BASE + i;
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int irq = pci_irq_vector(mdev->pdev, vecidx);
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if (!zalloc_cpumask_var(&priv->irq_info[vecidx].mask, GFP_KERNEL)) {
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mlx5_core_warn(mdev, "zalloc_cpumask_var failed");
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return -ENOMEM;
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}
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cpumask_set_cpu(cpumask_local_spread(i, priv->numa_node),
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priv->irq_info[vecidx].mask);
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if (IS_ENABLED(CONFIG_SMP) &&
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irq_set_affinity_hint(irq, priv->irq_info[vecidx].mask))
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mlx5_core_warn(mdev, "irq_set_affinity_hint failed, irq 0x%.4x", irq);
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return 0;
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}
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static void mlx5_irq_clear_affinity_hint(struct mlx5_core_dev *mdev, int i)
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{
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int vecidx = MLX5_EQ_VEC_COMP_BASE + i;
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struct mlx5_priv *priv = &mdev->priv;
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int irq = pci_irq_vector(mdev->pdev, vecidx);
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irq_set_affinity_hint(irq, NULL);
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free_cpumask_var(priv->irq_info[vecidx].mask);
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}
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static int mlx5_irq_set_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int err;
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int i;
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for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++) {
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err = mlx5_irq_set_affinity_hint(mdev, i);
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if (err)
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goto err_out;
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}
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return 0;
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err_out:
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for (i--; i >= 0; i--)
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mlx5_irq_clear_affinity_hint(mdev, i);
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return err;
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}
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static void mlx5_irq_clear_affinity_hints(struct mlx5_core_dev *mdev)
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{
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int i;
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for (i = 0; i < mdev->priv.eq_table.num_comp_vectors; i++)
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mlx5_irq_clear_affinity_hint(mdev, i);
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}
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int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn,
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unsigned int *irqn)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq, *n;
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int err = -ENOENT;
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int i = 0;
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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if (i++ == vector) {
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*eqn = eq->eqn;
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*irqn = eq->irqn;
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err = 0;
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break;
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}
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}
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return err;
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}
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EXPORT_SYMBOL(mlx5_vector2eqn);
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struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq;
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list_for_each_entry(eq, &table->comp_eqs_list, list) {
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if (eq->eqn == eqn)
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return eq;
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}
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return ERR_PTR(-ENOENT);
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}
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static void free_comp_eqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq, *n;
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#ifdef CONFIG_RFS_ACCEL
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if (dev->rmap) {
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free_irq_cpu_rmap(dev->rmap);
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dev->rmap = NULL;
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}
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#endif
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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list_del(&eq->list);
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if (mlx5_destroy_unmap_eq(dev, eq))
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mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n",
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eq->eqn);
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kfree(eq);
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}
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}
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static int alloc_comp_eqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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char name[MLX5_MAX_IRQ_NAME];
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struct mlx5_eq *eq;
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int ncomp_vec;
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int nent;
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int err;
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int i;
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INIT_LIST_HEAD(&table->comp_eqs_list);
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ncomp_vec = table->num_comp_vectors;
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nent = MLX5_COMP_EQ_SIZE;
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#ifdef CONFIG_RFS_ACCEL
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dev->rmap = alloc_irq_cpu_rmap(ncomp_vec);
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if (!dev->rmap)
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return -ENOMEM;
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#endif
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for (i = 0; i < ncomp_vec; i++) {
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eq = kzalloc(sizeof(*eq), GFP_KERNEL);
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if (!eq) {
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err = -ENOMEM;
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goto clean;
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}
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#ifdef CONFIG_RFS_ACCEL
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irq_cpu_rmap_add(dev->rmap, pci_irq_vector(dev->pdev,
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MLX5_EQ_VEC_COMP_BASE + i));
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#endif
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snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i);
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err = mlx5_create_map_eq(dev, eq,
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i + MLX5_EQ_VEC_COMP_BASE, nent, 0,
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name, MLX5_EQ_TYPE_COMP);
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if (err) {
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kfree(eq);
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goto clean;
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}
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mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
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list_add_tail(&eq->list, &table->comp_eqs_list);
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}
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return 0;
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clean:
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free_comp_eqs(dev);
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return err;
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}
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static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
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{
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u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0};
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@ -1177,18 +1015,12 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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goto err_fw_tracer;
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}
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err = alloc_comp_eqs(dev);
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err = mlx5_alloc_comp_eqs(dev);
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if (err) {
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dev_err(&pdev->dev, "Failed to alloc completion EQs\n");
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goto err_comp_eqs;
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}
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err = mlx5_irq_set_affinity_hints(dev);
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if (err) {
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dev_err(&pdev->dev, "Failed to alloc affinity hint cpumask\n");
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goto err_affinity_hints;
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}
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err = mlx5_fpga_device_start(dev);
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if (err) {
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dev_err(&pdev->dev, "fpga device start failed %d\n", err);
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@ -1257,10 +1089,7 @@ err_ipsec_start:
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mlx5_fpga_device_stop(dev);
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err_fpga_start:
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mlx5_irq_clear_affinity_hints(dev);
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err_affinity_hints:
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free_comp_eqs(dev);
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mlx5_free_comp_eqs(dev);
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err_comp_eqs:
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mlx5_fw_tracer_cleanup(dev->tracer);
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@ -1331,8 +1160,7 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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mlx5_accel_ipsec_cleanup(dev);
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mlx5_accel_tls_cleanup(dev);
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mlx5_fpga_device_stop(dev);
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mlx5_irq_clear_affinity_hints(dev);
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free_comp_eqs(dev);
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mlx5_free_comp_eqs(dev);
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mlx5_fw_tracer_cleanup(dev->tracer);
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mlx5_stop_eqs(dev);
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mlx5_put_uars_page(dev, priv->uar);
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@ -1628,7 +1456,6 @@ succeed:
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* kexec. There is no need to cleanup the mlx5_core software
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* contexts.
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*/
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mlx5_irq_clear_affinity_hints(dev);
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mlx5_core_eq_free_irqs(dev);
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return 0;
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@ -136,6 +136,8 @@ int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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u32 *out, int outlen);
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int mlx5_start_eqs(struct mlx5_core_dev *dev);
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void mlx5_stop_eqs(struct mlx5_core_dev *dev);
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int mlx5_alloc_comp_eqs(struct mlx5_core_dev *dev);
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void mlx5_free_comp_eqs(struct mlx5_core_dev *dev);
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/* This function should only be called after mlx5_cmd_force_teardown_hca */
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void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
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struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
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