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sh: simplify se7780 IRQ code

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The new intc code handles IRQ3 and IRQ7 in the cpu specific code
already, so there is no reason to duplicate that here.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm 2007-07-31 17:13:39 +09:00 committed by Paul Mundt
parent e29bfbc443
commit c9d03d9a80
2 changed files with 1 additions and 28 deletions
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1
arch/sh/Kconfig
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@ -258,7 +258,6 @@ config SH_7780_SOLUTION_ENGINE
bool "SolutionEngine7780" bool "SolutionEngine7780"
select SOLUTION_ENGINE select SOLUTION_ENGINE
select SYS_SUPPORTS_PCI select SYS_SUPPORTS_PCI
select CPU_HAS_INTC2_IRQ
depends on CPU_SUBTYPE_SH7780 depends on CPU_SUBTYPE_SH7780
help help
Select 7780 SolutionEngine if configuring for a Renesas SH7780 Select 7780 SolutionEngine if configuring for a Renesas SH7780

28
arch/sh/boards/se/7780/irq.c
View File

@ -16,32 +16,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/se7780.h> #include <asm/se7780.h>
static struct intc2_data intc2_irq_table[] = {
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
{ 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
{ 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
{ 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */
};
static struct intc2_desc intc2_irq_desc __read_mostly = {
.prio_base = 0, /* N/A */
.msk_base = 0xffd00044,
.mskclr_base = 0xffd00064,
.intc2_data = intc2_irq_table,
.nr_irqs = ARRAY_SIZE(intc2_irq_table),
.chip = {
.name = "INTC2-se7780",
},
};
/* /*
* Initialize IRQ setting * Initialize IRQ setting
*/ */
@ -68,5 +42,5 @@ void __init init_se7780_IRQ(void)
/* FPGA + 0x0A */ /* FPGA + 0x0A */
ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
register_intc2_controller(&intc2_irq_desc); plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
} }