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MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB

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We are so early in the boot process where we really don't want to
stall and wait for CP0 FTLB related changes become visible so just drop
the cp0 hazard barrier.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10649/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Markos Chandras 2015-07-09 10:40:50 +01:00 committed by Ralf Baechle
parent 6f50c83529
commit c982c6d6c4
1 changed files with 0 additions and 1 deletions
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arch/mips/kernel/cpu-probe.c
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@ -385,7 +385,6 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
else else
/* Disable FTLB */ /* Disable FTLB */
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN); write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
back_to_back_c0_hazard();
break; break;
} }
} }