forked from Minki/linux
Two GPIO fixes for the v5.0 series:
- Per-instance irqchip on the MT7621 - Avoid direction setting using pin control on MMP2 -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcbQj3AAoJEEEQszewGV1z74MP/3x9l6+oX4xU6ub+JcTf7c+T OvEpWuNQ8G9pA9gOY7/GoiBN2E8z+apDB0jczJkuOWgpHPObCNDaFz0PRFYej6Ir 3hw1CdopHoqchaccfG/gW5kRr1b5Epszj1BllYSqJBuOc+IC0SD8MEYya3fQqTa4 D98sONogL8W4ea0bvuiQ0UuVZfBT6v83IUXPgGiRN31a2PqNj/zrETpyWHmlDxEL CRgYKOFbkKdymKCY9PClfaMbvC2angApAywbRlwG8sy5qsDXKKZNs50PF0XWHlPY U7YKnO0aOEHATGFLQlczYvsbDoGTTOQzMsy6sptffww2lHx1eKJhhIsNTrI04Vnv ngRVYgZxyMvBE2C1GIqmu+IIgMJhDn5qKjnrjC9fX2fFHRndmzWyWfORasE41jM/ xREV/KcM4J5Pg8+W4QBKsSvyB7R4LjPnmpYqhqPU5WZsNbwweTtmTqyZnuhYwwJO hp9XmHW91xSWHpZO0q1aeSZVi0bKDyd56ZjjV30qOEZvspM9NxTZYohcvGh/23+1 U9JQGuu+I+QfLRIy/QSL/S9+84hvhS5FNc5Yi/2hZa2j8sFazST5UHYrkU72AJc9 GY6eucymE0LAZId18EZMCs3zjf3ZN/ysX10OlvUQMipBO/bSHX7xya8bq2n8HarC DDIAlCVA9d4M2kBIMNLp =zceM -----END PGP SIGNATURE----- Merge tag 'gpio-v5.0-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO fixes from Linus Walleij: "Two GPIO fixes for the v5.0 series: - Per-instance irqchip on the MT7621 - Avoid direction setting using pin control on MMP2" * tag 'gpio-v5.0-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio: pxa: avoid attempting to set pin direction via pinctrl on MMP2 gpio: MT7621: use a per instance irq_chip structure
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commit
c828c2651b
@ -30,6 +30,7 @@
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#define GPIO_REG_EDGE 0xA0
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struct mtk_gc {
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struct irq_chip irq_chip;
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struct gpio_chip chip;
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spinlock_t lock;
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int bank;
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@ -189,13 +190,6 @@ mediatek_gpio_irq_type(struct irq_data *d, unsigned int type)
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return 0;
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}
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static struct irq_chip mediatek_gpio_irq_chip = {
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.irq_unmask = mediatek_gpio_irq_unmask,
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.irq_mask = mediatek_gpio_irq_mask,
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.irq_mask_ack = mediatek_gpio_irq_mask,
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.irq_set_type = mediatek_gpio_irq_type,
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};
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static int
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mediatek_gpio_xlate(struct gpio_chip *chip,
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const struct of_phandle_args *spec, u32 *flags)
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@ -254,6 +248,13 @@ mediatek_gpio_bank_probe(struct device *dev,
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return ret;
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}
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rg->irq_chip.name = dev_name(dev);
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rg->irq_chip.parent_device = dev;
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rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask;
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rg->irq_chip.irq_mask = mediatek_gpio_irq_mask;
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rg->irq_chip.irq_mask_ack = mediatek_gpio_irq_mask;
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rg->irq_chip.irq_set_type = mediatek_gpio_irq_type;
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if (mtk->gpio_irq) {
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/*
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* Manually request the irq here instead of passing
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@ -270,14 +271,14 @@ mediatek_gpio_bank_probe(struct device *dev,
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return ret;
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}
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ret = gpiochip_irqchip_add(&rg->chip, &mediatek_gpio_irq_chip,
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ret = gpiochip_irqchip_add(&rg->chip, &rg->irq_chip,
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0, handle_simple_irq, IRQ_TYPE_NONE);
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if (ret) {
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dev_err(dev, "failed to add gpiochip_irqchip\n");
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return ret;
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}
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gpiochip_set_chained_irqchip(&rg->chip, &mediatek_gpio_irq_chip,
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gpiochip_set_chained_irqchip(&rg->chip, &rg->irq_chip,
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mtk->gpio_irq, NULL);
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}
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@ -310,7 +311,6 @@ mediatek_gpio_probe(struct platform_device *pdev)
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mtk->gpio_irq = irq_of_parse_and_map(np, 0);
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mtk->dev = dev;
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platform_set_drvdata(pdev, mtk);
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mediatek_gpio_irq_chip.name = dev_name(dev);
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for (i = 0; i < MTK_BANK_CNT; i++) {
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ret = mediatek_gpio_bank_probe(dev, np, i);
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@ -245,6 +245,7 @@ static bool pxa_gpio_has_pinctrl(void)
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{
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switch (gpio_type) {
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case PXA3XX_GPIO:
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case MMP2_GPIO:
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return false;
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default:
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