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drm/i915: Move the dbuf pre/post plane update

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Encapsulate the dbuf state more by moving the pre/post
plane functions out from intel_display.c. We stick them
into intel_pm.c since that's where the rest of the code
lives for now.

Eventually we should add a new file for this stuff at which
point we also need to decide if it makes sense to even split
the wm code from the ddb code, or to keep them together.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200225171125.28885-11-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
This commit is contained in:
Ville Syrjälä 2020-02-25 19:11:15 +02:00
parent 0cde0e0ff5
commit c7c0e7ebe4
3 changed files with 41 additions and 39 deletions
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41
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -15208,43 +15208,6 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
}
}
static void icl_dbuf_slice_pre_update(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
if (!new_dbuf_state ||
new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
return;
WARN_ON(!new_dbuf_state->base.changed);
gen9_dbuf_slices_update(dev_priv,
old_dbuf_state->enabled_slices |
new_dbuf_state->enabled_slices);
}
static void icl_dbuf_slice_post_update(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
if (!new_dbuf_state ||
new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
return;
WARN_ON(!new_dbuf_state->base.changed);
gen9_dbuf_slices_update(dev_priv,
new_dbuf_state->enabled_slices);
}
static void skl_commit_modeset_enables(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
@ -15485,7 +15448,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
if (state->modeset)
intel_encoders_update_prepare(state);
icl_dbuf_slice_pre_update(state);
intel_dbuf_pre_plane_update(state);
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
dev_priv->display.commit_modeset_enables(state);
@ -15540,7 +15503,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
dev_priv->display.optimize_watermarks(state, crtc);
}
icl_dbuf_slice_post_update(state);
intel_dbuf_post_plane_update(state);
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
intel_post_plane_update(state, crtc);

37
drivers/gpu/drm/i915/intel_pm.c
View File

@ -7806,3 +7806,40 @@ int intel_dbuf_init(struct drm_i915_private *dev_priv)
return 0;
}
void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
if (!new_dbuf_state ||
new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
return;
WARN_ON(!new_dbuf_state->base.changed);
gen9_dbuf_slices_update(dev_priv,
old_dbuf_state->enabled_slices |
new_dbuf_state->enabled_slices);
}
void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_dbuf_state *new_dbuf_state =
intel_atomic_get_new_dbuf_state(state);
const struct intel_dbuf_state *old_dbuf_state =
intel_atomic_get_old_dbuf_state(state);
if (!new_dbuf_state ||
new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
return;
WARN_ON(!new_dbuf_state->base.changed);
gen9_dbuf_slices_update(dev_priv,
new_dbuf_state->enabled_slices);
}

2
drivers/gpu/drm/i915/intel_pm.h
View File

@ -83,5 +83,7 @@ intel_atomic_get_dbuf_state(struct intel_atomic_state *state);
to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->dbuf.obj))
int intel_dbuf_init(struct drm_i915_private *dev_priv);
void intel_dbuf_pre_plane_update(struct intel_atomic_state *state);
void intel_dbuf_post_plane_update(struct intel_atomic_state *state);
#endif /* __INTEL_PM_H__ */