forked from Minki/linux
LoongArch: Use acpi_arch_dma_setup() and remove ARCH_HAS_PHYS_TO_DMA
Use _DMA defined in ACPI spec for translation between DMA address and CPU address, and implement acpi_arch_dma_setup for initializing dev->dma_range_map, where acpi_dma_get_range is called for parsing _DMA. e.g. If we have two dma ranges: cpu address dma address size offset 0x200080000000 0x2080000000 0x400000000 0x1fe000000000 0x400080000000 0x4080000000 0x400000000 0x3fc000000000 _DMA for pci devices should be declared in host bridge as flowing: Name (_DMA, ResourceTemplate() { QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0, 0x4080000000, 0x447fffffff, 0x3fc000000000, 0x400000000, , , ) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0, 0x2080000000, 0x247fffffff, 0x1fe000000000, 0x400000000, , , ) }) Acked-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -10,7 +10,6 @@ config LOONGARCH
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select ARCH_ENABLE_MEMORY_HOTPLUG
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select ARCH_ENABLE_MEMORY_HOTREMOVE
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_INLINE_READ_LOCK if !PREEMPTION
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@ -2,39 +2,29 @@
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-map-ops.h>
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#include <linux/swiotlb.h>
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#include <asm/bootinfo.h>
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#include <asm/dma.h>
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#include <asm/loongson.h>
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/*
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* We extract 4bit node id (bit 44~47) from Loongson-3's
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* 48bit physical address space and embed it into 40bit.
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*/
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static int node_id_offset;
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dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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void acpi_arch_dma_setup(struct device *dev)
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{
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long nid = (paddr >> 44) & 0xf;
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int ret;
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u64 mask, end = 0;
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const struct bus_dma_region *map = NULL;
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ret = acpi_dma_get_range(dev, &map);
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if (!ret && map) {
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const struct bus_dma_region *r = map;
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for (end = 0; r->size; r++) {
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if (r->dma_start + r->size - 1 > end)
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end = r->dma_start + r->size - 1;
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}
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mask = DMA_BIT_MASK(ilog2(end) + 1);
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dev->bus_dma_limit = end;
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dev->dma_range_map = map;
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dev->coherent_dma_mask = min(dev->coherent_dma_mask, mask);
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*dev->dma_mask = min(*dev->dma_mask, mask);
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}
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return ((nid << 44) ^ paddr) | (nid << node_id_offset);
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}
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phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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long nid = (daddr >> node_id_offset) & 0xf;
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return ((nid << node_id_offset) ^ daddr) | (nid << 44);
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}
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void __init plat_swiotlb_setup(void)
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{
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swiotlb_init(true, SWIOTLB_VERBOSE);
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node_id_offset = ((readl(LS7A_DMA_CFG) & LS7A_DMA_NODE_MASK) >> LS7A_DMA_NODE_SHF) + 36;
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}
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@ -247,7 +247,7 @@ static void __init arch_mem_init(char **cmdline_p)
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sparse_init();
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memblock_set_bottom_up(true);
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plat_swiotlb_setup();
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swiotlb_init(true, SWIOTLB_VERBOSE);
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dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
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@ -279,14 +279,17 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa) { }
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void acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa);
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#if defined(CONFIG_ARM64) || defined(CONFIG_LOONGARCH)
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void acpi_arch_dma_setup(struct device *dev);
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#else
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static inline void acpi_arch_dma_setup(struct device *dev) { }
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#endif
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#ifdef CONFIG_ARM64
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void acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa);
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void acpi_arch_dma_setup(struct device *dev);
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#else
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static inline void
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acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa) { }
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static inline void
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acpi_arch_dma_setup(struct device *dev) { }
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#endif
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int acpi_numa_memory_affinity_init (struct acpi_srat_mem_affinity *ma);
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