drm/amd/display: only polling VSync Phase within VSync peroroid
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c9bb686b59
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c7299705e6
@ -1862,13 +1862,13 @@ bool dc_link_set_abm_disable(const struct dc_link *link)
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}
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bool dc_link_set_psr_enable(const struct dc_link *link, bool enable)
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bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
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{
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struct dc *core_dc = link->ctx->dc;
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struct dmcu *dmcu = core_dc->res_pool->dmcu;
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if (dmcu != NULL && link->psr_enabled)
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dmcu->funcs->set_psr_enable(dmcu, enable);
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dmcu->funcs->set_psr_enable(dmcu, enable, wait);
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return true;
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}
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@ -1653,8 +1653,8 @@ static bool handle_hpd_irq_psr_sink(const struct dc_link *link)
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sizeof(psr_error_status.raw));
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/* PSR error, disable and re-enable PSR */
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dc_link_set_psr_enable(link, false);
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dc_link_set_psr_enable(link, true);
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dc_link_set_psr_enable(link, false, true);
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dc_link_set_psr_enable(link, true, true);
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return true;
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} else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS ==
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@ -871,7 +871,7 @@ struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index);
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bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
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uint32_t frame_ramp, const struct dc_stream_state *stream);
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bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
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bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable, bool wait);
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bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
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@ -103,7 +103,7 @@ static void dce_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)
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REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
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}
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static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
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static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
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{
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struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
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unsigned int dmcu_max_retry_on_wait_reg_ready = 801;
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@ -127,17 +127,18 @@ static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
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/* notifyDMCUMsg */
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REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);
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for (retryCount = 0; retryCount <= 100; retryCount++) {
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dce_get_dmcu_psr_state(dmcu, &psr_state);
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if (enable) {
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if (psr_state != 0)
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break;
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} else {
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if (psr_state == 0)
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break;
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if (wait == true) {
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for (retryCount = 0; retryCount <= 100; retryCount++) {
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dce_get_dmcu_psr_state(dmcu, &psr_state);
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if (enable) {
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if (psr_state != 0)
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break;
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} else {
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if (psr_state == 0)
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break;
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}
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dm_delay_in_microseconds(dmcu->ctx, 10);
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}
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dm_delay_in_microseconds(dmcu->ctx, 10);
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}
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}
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@ -338,7 +339,7 @@ static void dcn10_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)
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REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
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}
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static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
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static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
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{
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struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
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unsigned int dmcu_max_retry_on_wait_reg_ready = 801;
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@ -367,6 +368,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
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* Exit PSR may need to wait 1-2 frames to power up. Timeout after at
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* least a few frames. Should never hit the max retry assert below.
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*/
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if (wait == true) {
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for (retryCount = 0; retryCount <= 1000; retryCount++) {
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dcn10_get_dmcu_psr_state(dmcu, &psr_state);
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if (enable) {
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@ -381,6 +383,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
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/* assert if max retry hit */
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ASSERT(retryCount <= 1000);
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}
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}
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static void dcn10_dmcu_setup_psr(struct dmcu *dmcu,
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@ -37,7 +37,7 @@ struct dmcu_funcs {
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unsigned int start_offset,
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const char *src,
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unsigned int bytes);
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void (*set_psr_enable)(struct dmcu *dmcu, bool enable);
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void (*set_psr_enable)(struct dmcu *dmcu, bool enable, bool wait);
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void (*setup_psr)(struct dmcu *dmcu,
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struct dc_link *link,
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struct psr_context *psr_context);
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