forked from Minki/linux
dmaengine: mv_xor: Add support for scatter-gather DMA mode
This patch adds memory to memory scatter-gather support to the Marvell mv_or DMA driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Stefan Roese
Vinod Koul
parent
e9bb8a9df3
commit
c5db858bdf
@ -68,6 +68,36 @@ static void mv_desc_init(struct mv_xor_desc_slot *desc,
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hw_desc->byte_count = byte_count;
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}
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/* Populate the descriptor */
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static void mv_xor_config_sg_ll_desc(struct mv_xor_desc_slot *desc,
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dma_addr_t dma_src, dma_addr_t dma_dst,
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u32 len, struct mv_xor_desc_slot *prev)
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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hw_desc->status = XOR_DESC_DMA_OWNED;
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hw_desc->phy_next_desc = 0;
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/* Configure for XOR with only one src address -> MEMCPY */
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hw_desc->desc_command = XOR_DESC_OPERATION_XOR | (0x1 << 0);
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hw_desc->phy_dest_addr = dma_dst;
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hw_desc->phy_src_addr[0] = dma_src;
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hw_desc->byte_count = len;
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if (prev) {
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struct mv_xor_desc *hw_prev = prev->hw_desc;
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hw_prev->phy_next_desc = desc->async_tx.phys;
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}
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}
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static void mv_xor_desc_config_eod(struct mv_xor_desc_slot *desc)
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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/* Enable end-of-descriptor interrupt */
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hw_desc->desc_command |= XOR_DESC_EOD_INT_EN;
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}
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static void mv_desc_set_mode(struct mv_xor_desc_slot *desc)
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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@ -228,8 +258,13 @@ mv_chan_clean_completed_slots(struct mv_xor_chan *mv_chan)
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list_for_each_entry_safe(iter, _iter, &mv_chan->completed_slots,
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node) {
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if (async_tx_test_ack(&iter->async_tx))
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if (async_tx_test_ack(&iter->async_tx)) {
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list_move_tail(&iter->node, &mv_chan->free_slots);
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if (!list_empty(&iter->sg_tx_list)) {
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list_splice_tail_init(&iter->sg_tx_list,
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&mv_chan->free_slots);
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}
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}
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}
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return 0;
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}
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@ -244,11 +279,20 @@ mv_desc_clean_slot(struct mv_xor_desc_slot *desc,
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/* the client is allowed to attach dependent operations
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* until 'ack' is set
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*/
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if (!async_tx_test_ack(&desc->async_tx))
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if (!async_tx_test_ack(&desc->async_tx)) {
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/* move this slot to the completed_slots */
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list_move_tail(&desc->node, &mv_chan->completed_slots);
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else
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if (!list_empty(&desc->sg_tx_list)) {
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list_splice_tail_init(&desc->sg_tx_list,
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&mv_chan->completed_slots);
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}
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} else {
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list_move_tail(&desc->node, &mv_chan->free_slots);
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if (!list_empty(&desc->sg_tx_list)) {
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list_splice_tail_init(&desc->sg_tx_list,
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&mv_chan->free_slots);
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}
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}
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return 0;
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}
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@ -450,6 +494,7 @@ static int mv_xor_alloc_chan_resources(struct dma_chan *chan)
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dma_async_tx_descriptor_init(&slot->async_tx, chan);
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slot->async_tx.tx_submit = mv_xor_tx_submit;
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INIT_LIST_HEAD(&slot->node);
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INIT_LIST_HEAD(&slot->sg_tx_list);
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dma_desc = mv_chan->dma_desc_pool;
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slot->async_tx.phys = dma_desc + idx * MV_XOR_SLOT_SIZE;
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slot->idx = idx++;
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@ -617,6 +662,132 @@ mv_xor_prep_dma_interrupt(struct dma_chan *chan, unsigned long flags)
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return mv_xor_prep_dma_xor(chan, dest, &src, 1, len, flags);
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}
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/**
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* mv_xor_prep_dma_sg - prepare descriptors for a memory sg transaction
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* @chan: DMA channel
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* @dst_sg: Destination scatter list
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* @dst_sg_len: Number of entries in destination scatter list
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* @src_sg: Source scatter list
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* @src_sg_len: Number of entries in source scatter list
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* @flags: transfer ack flags
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*
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* Return: Async transaction descriptor on success and NULL on failure
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*/
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static struct dma_async_tx_descriptor *
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mv_xor_prep_dma_sg(struct dma_chan *chan, struct scatterlist *dst_sg,
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unsigned int dst_sg_len, struct scatterlist *src_sg,
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unsigned int src_sg_len, unsigned long flags)
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{
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struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan);
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struct mv_xor_desc_slot *new;
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struct mv_xor_desc_slot *first = NULL;
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struct mv_xor_desc_slot *prev = NULL;
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size_t len, dst_avail, src_avail;
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dma_addr_t dma_dst, dma_src;
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int desc_cnt = 0;
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int ret;
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dev_dbg(mv_chan_to_devp(mv_chan),
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"%s dst_sg_len: %d src_sg_len: %d flags: %ld\n",
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__func__, dst_sg_len, src_sg_len, flags);
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dst_avail = sg_dma_len(dst_sg);
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src_avail = sg_dma_len(src_sg);
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/* Run until we are out of scatterlist entries */
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while (true) {
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/* Allocate and populate the descriptor */
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desc_cnt++;
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new = mv_chan_alloc_slot(mv_chan);
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if (!new) {
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dev_err(mv_chan_to_devp(mv_chan),
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"Out of descriptors (desc_cnt=%d)!\n",
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desc_cnt);
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goto err;
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}
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len = min_t(size_t, src_avail, dst_avail);
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len = min_t(size_t, len, MV_XOR_MAX_BYTE_COUNT);
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if (len == 0)
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goto fetch;
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if (len < MV_XOR_MIN_BYTE_COUNT) {
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dev_err(mv_chan_to_devp(mv_chan),
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"Transfer size of %zu too small!\n", len);
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goto err;
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}
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dma_dst = sg_dma_address(dst_sg) + sg_dma_len(dst_sg) -
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dst_avail;
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dma_src = sg_dma_address(src_sg) + sg_dma_len(src_sg) -
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src_avail;
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/* Check if a new window needs to get added for 'dst' */
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ret = mv_xor_add_io_win(mv_chan, dma_dst);
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if (ret)
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goto err;
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/* Check if a new window needs to get added for 'src' */
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ret = mv_xor_add_io_win(mv_chan, dma_src);
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if (ret)
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goto err;
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/* Populate the descriptor */
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mv_xor_config_sg_ll_desc(new, dma_src, dma_dst, len, prev);
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prev = new;
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dst_avail -= len;
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src_avail -= len;
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if (!first)
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first = new;
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else
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list_move_tail(&new->node, &first->sg_tx_list);
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fetch:
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/* Fetch the next dst scatterlist entry */
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if (dst_avail == 0) {
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if (dst_sg_len == 0)
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break;
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/* Fetch the next entry: if there are no more: done */
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dst_sg = sg_next(dst_sg);
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if (dst_sg == NULL)
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break;
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dst_sg_len--;
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dst_avail = sg_dma_len(dst_sg);
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}
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/* Fetch the next src scatterlist entry */
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if (src_avail == 0) {
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if (src_sg_len == 0)
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break;
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/* Fetch the next entry: if there are no more: done */
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src_sg = sg_next(src_sg);
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if (src_sg == NULL)
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break;
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src_sg_len--;
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src_avail = sg_dma_len(src_sg);
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}
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}
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/* Set the EOD flag in the last descriptor */
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mv_xor_desc_config_eod(new);
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first->async_tx.flags = flags;
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return &first->async_tx;
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err:
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/* Cleanup: Move all descriptors back into the free list */
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spin_lock_bh(&mv_chan->lock);
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mv_desc_clean_slot(first, mv_chan);
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spin_unlock_bh(&mv_chan->lock);
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return NULL;
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}
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static void mv_xor_free_chan_resources(struct dma_chan *chan)
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{
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struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan);
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@ -1083,6 +1254,8 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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dma_dev->device_prep_dma_interrupt = mv_xor_prep_dma_interrupt;
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if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask))
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dma_dev->device_prep_dma_memcpy = mv_xor_prep_dma_memcpy;
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if (dma_has_cap(DMA_SG, dma_dev->cap_mask))
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dma_dev->device_prep_dma_sg = mv_xor_prep_dma_sg;
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if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
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dma_dev->max_xor = 8;
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dma_dev->device_prep_dma_xor = mv_xor_prep_dma_xor;
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@ -1132,10 +1305,11 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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goto err_free_irq;
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}
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dev_info(&pdev->dev, "Marvell XOR (%s): ( %s%s%s)\n",
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dev_info(&pdev->dev, "Marvell XOR (%s): ( %s%s%s%s)\n",
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mv_chan->op_in_desc ? "Descriptor Mode" : "Registers Mode",
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dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "xor " : "",
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dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask) ? "cpy " : "",
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dma_has_cap(DMA_SG, dma_dev->cap_mask) ? "sg " : "",
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dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask) ? "intr " : "");
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dma_async_device_register(dma_dev);
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@ -1378,6 +1552,7 @@ static int mv_xor_probe(struct platform_device *pdev)
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dma_cap_zero(cap_mask);
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dma_cap_set(DMA_MEMCPY, cap_mask);
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dma_cap_set(DMA_SG, cap_mask);
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dma_cap_set(DMA_XOR, cap_mask);
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dma_cap_set(DMA_INTERRUPT, cap_mask);
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@ -148,6 +148,7 @@ struct mv_xor_chan {
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*/
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struct mv_xor_desc_slot {
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struct list_head node;
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struct list_head sg_tx_list;
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enum dma_transaction_type type;
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void *hw_desc;
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u16 idx;
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