forked from Minki/linux
ARM: imx: enable multi-platform build
It enables multi-platform build for imx. With ARCH_MULTI_* options coming to play, ARCH_MXC becomes an user invisible option, while ARCH_IMX_V4_V5 and ARCH_IMX_V6_V7 get removed. Both imx_v4_v5_defconfig and imx_v6_v7_defconfig get updated to adopt the changes. AUTO_ZRELADDR and ARM_PATCH_PHYS_VIRT are selected by ARCH_MXC now to save the duplication. Headers timex.h and uncompress.h are not needed for multi-platform build. Remove them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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69ac71d370
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c5a0d4977f
@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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config ARCH_MXC
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bool "Freescale MXC/iMX-based"
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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select USE_OF
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help
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Support for Freescale MXC/iMX-based family of processors
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config ARCH_MXS
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bool "Freescale MXS-based"
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select ARCH_REQUIRE_GPIOLIB
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@ -17,8 +17,9 @@ CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_MXC=y
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CONFIG_ARCH_IMX_V4_V5=y
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CONFIG_ARCH_MULTI_V4T=y
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CONFIG_ARCH_MULTI_V5=y
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# CONFIG_ARCH_MULTI_V7 is not set
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CONFIG_ARCH_MX1ADS=y
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CONFIG_MACH_SCB9328=y
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CONFIG_MACH_APF9328=y
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@ -16,7 +16,8 @@ CONFIG_MODULE_UNLOAD=y
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CONFIG_MODVERSIONS=y
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CONFIG_MODULE_SRCVERSION_ALL=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_MXC=y
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CONFIG_ARCH_MULTI_V6=y
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CONFIG_ARCH_MULTI_V7=y
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CONFIG_MACH_MX31LILLY=y
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CONFIG_MACH_MX31LITE=y
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CONFIG_MACH_PCM037=y
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@ -1,4 +1,20 @@
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if ARCH_MXC
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config ARCH_MXC
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def_bool y if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
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select ARCH_REQUIRE_GPIOLIB
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select ARM_PATCH_PHYS_VIRT
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select AUTO_ZRELADDR if !ZBOOT_ROM
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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select USE_OF
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help
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Support for Freescale MXC/iMX-based family of processors
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menu "Freescale i.MX support"
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depends on ARCH_MXC
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config MXC_IRQ_PRIOR
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bool "Use IRQ priority"
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@ -161,21 +177,7 @@ config SOC_IMX51
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select PINCTRL_IMX51
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select SOC_IMX5
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menu "Freescale MXC Implementations"
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choice
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prompt "Freescale CPU family:"
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default ARCH_IMX_V6_V7
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config ARCH_IMX_V4_V5
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bool "i.MX1, i.MX21, i.MX25, i.MX27"
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select ARM_PATCH_PHYS_VIRT
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select AUTO_ZRELADDR if !ZBOOT_ROM
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help
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This enables support for systems based on the Freescale i.MX ARMv4
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and ARMv5 SoCs
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if ARCH_IMX_V4_V5
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if ARCH_MULTI_V4T
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comment "MX1 platforms:"
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config MACH_MXLADS
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@ -204,6 +206,10 @@ config MACH_APF9328
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help
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Say Yes here if you are using the Armadeus APF9328 development board
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endif
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if ARCH_MULTI_V5
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comment "MX21 platforms:"
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config MACH_MX21ADS
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@ -455,16 +461,7 @@ config MACH_IMX27_DT
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endif
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config ARCH_IMX_V6_V7
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bool "i.MX3, i.MX5, i.MX6"
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select ARM_PATCH_PHYS_VIRT
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select AUTO_ZRELADDR if !ZBOOT_ROM
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select MIGHT_HAVE_CACHE_L2X0
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help
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This enables support for systems based on the Freescale i.MX3, i.MX5
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and i.MX6 family.
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if ARCH_IMX_V6_V7
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if ARCH_MULTI_V6
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comment "MX31 platforms:"
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@ -729,6 +726,10 @@ config MACH_VPR200
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Include support for VPR200 platform. This includes specific
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configurations for the board and its peripherals.
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endif
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if ARCH_MULTI_V7
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comment "i.MX5 platforms:"
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config MACH_MX50_RDP
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@ -847,10 +848,6 @@ config SOC_IMX6Q
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endif
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endchoice
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endmenu
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source "arch/arm/mach-imx/devices/Kconfig"
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endif
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endmenu
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@ -1,22 +0,0 @@
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/*
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* Copyright (C) 1999 ARM Limited
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_MXC_TIMEX_H__
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#define __ASM_ARCH_MXC_TIMEX_H__
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/* Bogus value */
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#define CLOCK_TICK_RATE 12345678
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#endif /* __ASM_ARCH_MXC_TIMEX_H__ */
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@ -1,132 +0,0 @@
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/*
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* arch/arm/plat-mxc/include/mach/uncompress.h
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*
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* Copyright (C) 1999 ARM Limited
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* Copyright (C) Shane Nay (shane@minirl.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
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#define __ASM_ARCH_MXC_UNCOMPRESS_H__
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#define __MXC_BOOT_UNCOMPRESS
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#include <asm/mach-types.h>
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unsigned long uart_base;
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#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
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#define USR2 0x98
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#define USR2_TXFE (1<<14)
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#define TXR 0x40
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#define UCR1 0x80
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#define UCR1_UARTEN 1
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/*
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* The following code assumes the serial port has already been
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* initialized by the bootloader. We search for the first enabled
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* port in the most probable order. If you didn't setup a port in
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* your bootloader then nothing will appear (which might be desired).
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*
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* This does not append a newline
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*/
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static void putc(int ch)
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{
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if (!uart_base)
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return;
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if (!(UART(UCR1) & UCR1_UARTEN))
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return;
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while (!(UART(USR2) & USR2_TXFE))
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barrier();
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UART(TXR) = ch;
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}
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static inline void flush(void)
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{
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}
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#define MX1_UART1_BASE_ADDR 0x00206000
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX2X_UART1_BASE_ADDR 0x1000a000
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#define MX3X_UART1_BASE_ADDR 0x43F90000
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#define MX3X_UART2_BASE_ADDR 0x43F94000
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#define MX3X_UART5_BASE_ADDR 0x43FB4000
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#define MX51_UART1_BASE_ADDR 0x73fbc000
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#define MX50_UART1_BASE_ADDR 0x53fbc000
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#define MX53_UART1_BASE_ADDR 0x53fbc000
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static __inline__ void __arch_decomp_setup(unsigned long arch_id)
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{
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switch (arch_id) {
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case MACH_TYPE_MX1ADS:
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case MACH_TYPE_SCB9328:
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uart_base = MX1_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX25_3DS:
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uart_base = MX25_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_IMX27LITE:
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case MACH_TYPE_MX27_3DS:
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case MACH_TYPE_MX27ADS:
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case MACH_TYPE_PCM038:
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case MACH_TYPE_MX21ADS:
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case MACH_TYPE_PCA100:
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case MACH_TYPE_MXT_TD60:
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case MACH_TYPE_IMX27IPCAM:
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uart_base = MX2X_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX31LITE:
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case MACH_TYPE_ARMADILLO5X0:
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case MACH_TYPE_MX31MOBOARD:
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case MACH_TYPE_QONG:
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case MACH_TYPE_MX31_3DS:
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case MACH_TYPE_PCM037:
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case MACH_TYPE_MX31ADS:
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case MACH_TYPE_MX35_3DS:
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case MACH_TYPE_PCM043:
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case MACH_TYPE_LILLY1131:
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case MACH_TYPE_VPR200:
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case MACH_TYPE_EUKREA_CPUIMX35SD:
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uart_base = MX3X_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MAGX_ZN5:
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uart_base = MX3X_UART2_BASE_ADDR;
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break;
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case MACH_TYPE_BUG:
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uart_base = MX3X_UART5_BASE_ADDR;
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break;
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case MACH_TYPE_MX51_BABBAGE:
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case MACH_TYPE_EUKREA_CPUIMX51SD:
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case MACH_TYPE_MX51_3DS:
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uart_base = MX51_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX50_RDP:
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uart_base = MX50_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX53_EVK:
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case MACH_TYPE_MX53_LOCO:
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case MACH_TYPE_MX53_SMD:
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case MACH_TYPE_MX53_ARD:
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uart_base = MX53_UART1_BASE_ADDR;
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break;
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default:
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break;
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}
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}
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#define arch_decomp_setup() __arch_decomp_setup(arch_id)
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#define arch_decomp_wdog()
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#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
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