perf/x86: Synchronize PMU task contexts on optimized context switches
Install Intel specific PMU task context synchronization adapter and extend optimized context switch path with PMU specific task context synchronization to fix LBR callstack virtualization on context switches. Signed-off-by: Alexey Budankov <alexey.budankov@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Song Liu <songliubraving@fb.com> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: https://lkml.kernel.org/r/9c6445a9-bdba-ef03-3859-f1f91198f27a@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Ingo Molnar
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@@ -3204,10 +3204,21 @@ static void perf_event_context_sched_out(struct task_struct *task, int ctxn,
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raw_spin_lock(&ctx->lock);
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raw_spin_lock_nested(&next_ctx->lock, SINGLE_DEPTH_NESTING);
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if (context_equiv(ctx, next_ctx)) {
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struct pmu *pmu = ctx->pmu;
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WRITE_ONCE(ctx->task, next);
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WRITE_ONCE(next_ctx->task, task);
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swap(ctx->task_ctx_data, next_ctx->task_ctx_data);
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/*
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* PMU specific parts of task perf context can require
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* additional synchronization. As an example of such
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* synchronization see implementation details of Intel
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* LBR call stack data profiling;
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*/
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if (pmu->swap_task_ctx)
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pmu->swap_task_ctx(ctx, next_ctx);
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else
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swap(ctx->task_ctx_data, next_ctx->task_ctx_data);
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/*
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* RCU_INIT_POINTER here is safe because we've not
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