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ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x

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Due a copy/paste error, the 'reg' values for the third PCIe interface
on Armada 380, and the third and fourth PCIe interfaces on Armada 385
are wrong: they are equal to the one of the second PCIe interface.

This patch fixes this by using the appropriate 'reg' values for those
PCIe interfaces.

Without this fix, the third and fourth PCIe interfaces are unusable on
those platforms.

Reported-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400597008-4148-1-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: 0d3d96ab00 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2014-05-20 16:43:28 +02:00 committed by Jason Cooper
parent 788296b2d1
commit c2a3dd9d2b
2 changed files with 3 additions and 3 deletions
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2
arch/arm/boot/dts/armada-380.dtsi
View File

@ -99,7 +99,7 @@
pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;

4
arch/arm/boot/dts/armada-385.dtsi
View File

@ -110,7 +110,7 @@
pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@ -131,7 +131,7 @@
pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;