forked from Minki/linux
arm: mx28: fix bit operation in clock setting
reg | (1 << clk->enable_shift) always evaluates to true. Switch it
to & which makes much more sense. Same fix as 13be9f00
(ARM i.MX28: fix
bit operation) at a different location.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: stable@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
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reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
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reg &= ~BM_CLKCTRL_##dr##_DIV; \
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reg |= div << BP_CLKCTRL_##dr##_DIV; \
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if (reg | (1 << clk->enable_shift)) { \
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if (reg & (1 << clk->enable_shift)) { \
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pr_err("%s: clock is gated\n", __func__); \
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return -EINVAL; \
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} \
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