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Renesas ARM Based SoC Updates for v3.20

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* Multiplatform support for r8a73a4
 * No TWD setup in C for Multiplatform on r8a7779
 * Fix is_e2 warning in generic R-Car Gen2 SoC setup code
 * Add missing Add missing legacy INTCA0 clock for irqpin module on sh73a0
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Merge tag 'renesas-soc-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Renesas ARM Based SoC Updates for v3.20" from Simon Horman:

* Multiplatform support for r8a73a4
* No TWD setup in C for Multiplatform on r8a7779
* Fix is_e2 warning in generic R-Car Gen2 SoC setup code
* Add missing Add missing legacy INTCA0 clock for irqpin module on sh73a0

* tag 'renesas-soc-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a73a4: Multiplatform support
  ARM: shmobile: r8a7779: No TWD setup in C for Multiplatform
  ARM: shmobile: Fix is_e2 warning
  ARM: shmobile: sh73a0 legacy/reference: Add missing INTCA0 clock for irqpin module

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-01-12 14:35:09 -08:00
commit c25aad6318
4 changed files with 17 additions and 4 deletions
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5
arch/arm/mach-shmobile/Kconfig
View File

@ -51,6 +51,11 @@ config ARCH_R7S72100
bool "RZ/A1H (R7S72100)"
select SYS_SUPPORTS_SH_MTU2
config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
select ARCH_RMOBILE
select RENESAS_IRQC
config ARCH_R8A7740
bool "R-Mobile A1 (R8A77400)"
select ARCH_RMOBILE

10
arch/arm/mach-shmobile/clock-sh73a0.c
View File

@ -553,6 +553,7 @@ enum { MSTP001,
MSTP314, MSTP313, MSTP312, MSTP311,
MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
MSTP411, MSTP410, MSTP403,
MSTP508,
MSTP_NR };
#define MSTP(_parent, _reg, _bit, _flags) \
@ -597,6 +598,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
[MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
[MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
[MSTP508] = MSTP(&div4_clks[DIV4_HP], SMSTPCR5, 8, 0), /* INTCA0 */
};
/* The lookups structure below includes duplicate entries for some clocks
@ -677,6 +679,14 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
CLKDEV_DEV_ID("renesas_intc_irqpin.0", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("e6900000.irqpin", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("renesas_intc_irqpin.1", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("e6900004.irqpin", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("renesas_intc_irqpin.2", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("e6900008.irqpin", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("renesas_intc_irqpin.3", &mstp_clks[MSTP508]), /* INTCA0 */
CLKDEV_DEV_ID("e690000c.irqpin", &mstp_clks[MSTP508]), /* INTCA0 */
/* ICK */
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),

4
arch/arm/mach-shmobile/setup-rcar-gen2.c
View File

@ -52,15 +52,13 @@ void __init rcar_gen2_timer_init(void)
{
#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
u32 mode = rcar_gen2_read_mode_pins();
bool is_e2 = (bool)of_find_compatible_node(NULL, NULL,
"renesas,r8a7794");
#endif
#ifdef CONFIG_ARM_ARCH_TIMER
void __iomem *base;
int extal_mhz = 0;
u32 freq;
if (is_e2) {
if (of_machine_is_compatible("renesas,r8a7794")) {
freq = 260000000 / 8; /* ZS / 8 */
/* CNTVOFF has to be initialized either from non-secure
* Hypervisor mode or secure Monitor mode with SCR.NS==1.

2
arch/arm/mach-shmobile/smp-r8a7779.c
View File

@ -56,7 +56,7 @@ static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = {
[3] = &r8a7779_ch_cpu3,
};
#ifdef CONFIG_HAVE_ARM_TWD
#if defined(CONFIG_HAVE_ARM_TWD) && !defined(CONFIG_ARCH_MULTIPLATFORM)
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29);
void __init r8a7779_register_twd(void)
{