forked from Minki/linux
drm/i915: Canonicalize stolen memory calculations
Move the better constructs/comments from i915_gem_stolen.c to early-quirks.c and increase readability in preparation of only having one set of functions. - intel_stolen_base -> gen3_stolen_base - use phys_addr_t instead of u32 for address for future proofing v2: - Print the invalid register values (Chris) (Omitting the register prefix as it's visible from backtrace.) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
This commit is contained in:
Joonas Lahtinen
parent
050fc4653c
commit
c0dd3460b2
@ -223,36 +223,19 @@ static void __init intel_remapping_check(int num, int slot, int func)
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* despite the efforts of the "RAM buffer" approach, which simply rounds
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* memory boundaries up to 64M to try to catch space that may decode
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* as RAM and so is not suitable for MMIO.
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*
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* And yes, so far on current devices the base addr is always under 4G.
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*/
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static u32 __init intel_stolen_base(int num, int slot, int func, size_t stolen_size)
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{
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u32 base;
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/*
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* For the PCI IDs in this quirk, the stolen base is always
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* in 0x5c, aka the BDSM register (yes that's really what
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* it's called).
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*/
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base = read_pci_config(num, slot, func, 0x5c);
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base &= ~((1<<20) - 1);
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return base;
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}
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#define KB(x) ((x) * 1024UL)
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#define MB(x) (KB (KB (x)))
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#define GB(x) (MB (KB (x)))
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static size_t __init i830_tseg_size(void)
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{
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u8 tmp = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
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u8 esmramc = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
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if (!(tmp & TSEG_ENABLE))
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if (!(esmramc & TSEG_ENABLE))
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return 0;
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if (tmp & I830_TSEG_SIZE_1M)
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if (esmramc & I830_TSEG_SIZE_1M)
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return MB(1);
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else
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return KB(512);
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@ -260,27 +243,26 @@ static size_t __init i830_tseg_size(void)
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static size_t __init i845_tseg_size(void)
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{
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u8 tmp = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
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u8 esmramc = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
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u8 tseg_size = esmramc & I845_TSEG_SIZE_MASK;
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if (!(tmp & TSEG_ENABLE))
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if (!(esmramc & TSEG_ENABLE))
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return 0;
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switch (tmp & I845_TSEG_SIZE_MASK) {
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case I845_TSEG_SIZE_512K:
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return KB(512);
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case I845_TSEG_SIZE_1M:
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return MB(1);
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switch (tseg_size) {
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case I845_TSEG_SIZE_512K: return KB(512);
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case I845_TSEG_SIZE_1M: return MB(1);
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default:
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WARN_ON(1);
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return 0;
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WARN(1, "Unknown ESMRAMC value: %x!\n", esmramc);
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}
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return 0;
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}
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static size_t __init i85x_tseg_size(void)
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{
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u8 tmp = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
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u8 esmramc = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
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if (!(tmp & TSEG_ENABLE))
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if (!(esmramc & TSEG_ENABLE))
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return 0;
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return MB(1);
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@ -300,174 +282,166 @@ static size_t __init i85x_mem_size(void)
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* On 830/845/85x the stolen memory base isn't available in any
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* register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
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*/
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static u32 __init i830_stolen_base(int num, int slot, int func, size_t stolen_size)
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static phys_addr_t __init i830_stolen_base(int num, int slot, int func,
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size_t stolen_size)
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{
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return i830_mem_size() - i830_tseg_size() - stolen_size;
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return (phys_addr_t)i830_mem_size() - i830_tseg_size() - stolen_size;
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}
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static u32 __init i845_stolen_base(int num, int slot, int func, size_t stolen_size)
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static phys_addr_t __init i845_stolen_base(int num, int slot, int func,
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size_t stolen_size)
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{
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return i830_mem_size() - i845_tseg_size() - stolen_size;
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return (phys_addr_t)i830_mem_size() - i845_tseg_size() - stolen_size;
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}
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static u32 __init i85x_stolen_base(int num, int slot, int func, size_t stolen_size)
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static phys_addr_t __init i85x_stolen_base(int num, int slot, int func,
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size_t stolen_size)
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{
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return i85x_mem_size() - i85x_tseg_size() - stolen_size;
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return (phys_addr_t)i85x_mem_size() - i85x_tseg_size() - stolen_size;
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}
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static u32 __init i865_stolen_base(int num, int slot, int func, size_t stolen_size)
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static phys_addr_t __init i865_stolen_base(int num, int slot, int func,
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size_t stolen_size)
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{
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u16 toud;
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/*
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* FIXME is the graphics stolen memory region
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* always at TOUD? Ie. is it always the last
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* one to be allocated by the BIOS?
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*/
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return read_pci_config_16(0, 0, 0, I865_TOUD) << 16;
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toud = read_pci_config_16(0, 0, 0, I865_TOUD);
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return (phys_addr_t)toud << 16;
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}
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static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,
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size_t stolen_size)
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{
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u32 bsm;
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/* Almost universally we can find the Graphics Base of Stolen Memory
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* at register BSM (0x5c) in the igfx configuration space. On a few
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* (desktop) machines this is also mirrored in the bridge device at
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* different locations, or in the MCHBAR.
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*/
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bsm = read_pci_config(num, slot, func, INTEL_BSM);
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return (phys_addr_t)bsm & INTEL_BSM_MASK;
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}
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static size_t __init i830_stolen_size(int num, int slot, int func)
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{
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size_t stolen_size;
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(0, 0, 0, I830_GMCH_CTRL);
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gms = gmch_ctrl & I830_GMCH_GMS_MASK;
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switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
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case I830_GMCH_GMS_STOLEN_512:
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stolen_size = KB(512);
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break;
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case I830_GMCH_GMS_STOLEN_1024:
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stolen_size = MB(1);
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break;
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case I830_GMCH_GMS_STOLEN_8192:
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stolen_size = MB(8);
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break;
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case I830_GMCH_GMS_LOCAL:
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/* local memory isn't part of the normal address space */
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stolen_size = 0;
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break;
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switch (gms) {
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case I830_GMCH_GMS_STOLEN_512: return KB(512);
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case I830_GMCH_GMS_STOLEN_1024: return MB(1);
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case I830_GMCH_GMS_STOLEN_8192: return MB(8);
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/* local memory isn't part of the normal address space */
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case I830_GMCH_GMS_LOCAL: return 0;
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default:
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return 0;
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WARN(1, "Unknown GMCH_CTRL value: %x!\n", gmch_ctrl);
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}
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return stolen_size;
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return 0;
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}
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static size_t __init gen3_stolen_size(int num, int slot, int func)
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{
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size_t stolen_size;
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(0, 0, 0, I830_GMCH_CTRL);
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gms = gmch_ctrl & I855_GMCH_GMS_MASK;
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switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
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case I855_GMCH_GMS_STOLEN_1M:
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stolen_size = MB(1);
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break;
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case I855_GMCH_GMS_STOLEN_4M:
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stolen_size = MB(4);
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break;
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case I855_GMCH_GMS_STOLEN_8M:
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stolen_size = MB(8);
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break;
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case I855_GMCH_GMS_STOLEN_16M:
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stolen_size = MB(16);
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break;
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case I855_GMCH_GMS_STOLEN_32M:
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stolen_size = MB(32);
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break;
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case I915_GMCH_GMS_STOLEN_48M:
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stolen_size = MB(48);
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break;
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case I915_GMCH_GMS_STOLEN_64M:
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stolen_size = MB(64);
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break;
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case G33_GMCH_GMS_STOLEN_128M:
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stolen_size = MB(128);
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break;
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case G33_GMCH_GMS_STOLEN_256M:
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stolen_size = MB(256);
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break;
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case INTEL_GMCH_GMS_STOLEN_96M:
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stolen_size = MB(96);
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break;
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case INTEL_GMCH_GMS_STOLEN_160M:
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stolen_size = MB(160);
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break;
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case INTEL_GMCH_GMS_STOLEN_224M:
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stolen_size = MB(224);
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break;
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case INTEL_GMCH_GMS_STOLEN_352M:
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stolen_size = MB(352);
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break;
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switch (gms) {
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case I855_GMCH_GMS_STOLEN_1M: return MB(1);
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case I855_GMCH_GMS_STOLEN_4M: return MB(4);
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case I855_GMCH_GMS_STOLEN_8M: return MB(8);
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case I855_GMCH_GMS_STOLEN_16M: return MB(16);
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case I855_GMCH_GMS_STOLEN_32M: return MB(32);
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case I915_GMCH_GMS_STOLEN_48M: return MB(48);
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case I915_GMCH_GMS_STOLEN_64M: return MB(64);
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case G33_GMCH_GMS_STOLEN_128M: return MB(128);
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case G33_GMCH_GMS_STOLEN_256M: return MB(256);
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case INTEL_GMCH_GMS_STOLEN_96M: return MB(96);
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case INTEL_GMCH_GMS_STOLEN_160M:return MB(160);
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case INTEL_GMCH_GMS_STOLEN_224M:return MB(224);
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case INTEL_GMCH_GMS_STOLEN_352M:return MB(352);
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default:
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stolen_size = 0;
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break;
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WARN(1, "Unknown GMCH_CTRL value: %x!\n", gmch_ctrl);
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}
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return stolen_size;
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return 0;
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}
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static size_t __init gen6_stolen_size(int num, int slot, int func)
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{
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
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gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
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gmch_ctrl &= SNB_GMCH_GMS_MASK;
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gms = (gmch_ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;
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return gmch_ctrl << 25; /* 32 MB units */
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return (size_t)gms * MB(32);
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}
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static size_t __init gen8_stolen_size(int num, int slot, int func)
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{
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
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gmch_ctrl >>= BDW_GMCH_GMS_SHIFT;
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gmch_ctrl &= BDW_GMCH_GMS_MASK;
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return gmch_ctrl << 25; /* 32 MB units */
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gms = (gmch_ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;
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return (size_t)gms * MB(32);
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}
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static size_t __init chv_stolen_size(int num, int slot, int func)
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{
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
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gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
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gmch_ctrl &= SNB_GMCH_GMS_MASK;
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gms = (gmch_ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;
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/*
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* 0x0 to 0x10: 32MB increments starting at 0MB
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* 0x11 to 0x16: 4MB increments starting at 8MB
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* 0x17 to 0x1d: 4MB increments start at 36MB
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*/
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if (gmch_ctrl < 0x11)
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return gmch_ctrl << 25;
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else if (gmch_ctrl < 0x17)
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return (gmch_ctrl - 0x11 + 2) << 22;
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if (gms < 0x11)
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return (size_t)gms * MB(32);
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else if (gms < 0x17)
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return (size_t)(gms - 0x11 + 2) * MB(4);
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else
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return (gmch_ctrl - 0x17 + 9) << 22;
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return (size_t)(gms - 0x17 + 9) * MB(4);
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}
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struct intel_stolen_funcs {
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size_t (*size)(int num, int slot, int func);
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u32 (*base)(int num, int slot, int func, size_t size);
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phys_addr_t (*base)(int num, int slot, int func, size_t size);
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};
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static size_t __init gen9_stolen_size(int num, int slot, int func)
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{
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u16 gmch_ctrl;
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u16 gms;
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gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
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gmch_ctrl >>= BDW_GMCH_GMS_SHIFT;
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gmch_ctrl &= BDW_GMCH_GMS_MASK;
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gms = (gmch_ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;
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if (gmch_ctrl < 0xf0)
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return gmch_ctrl << 25; /* 32 MB units */
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/* 0x0 to 0xef: 32MB increments starting at 0MB */
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/* 0xf0 to 0xfe: 4MB increments starting at 4MB */
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if (gms < 0xf0)
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return (size_t)gms * MB(32);
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else
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/* 4MB increments starting at 0xf0 for 4MB */
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return (gmch_ctrl - 0xf0 + 1) << 22;
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return (size_t)(gms - 0xf0 + 1) * MB(4);
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}
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typedef size_t (*stolen_size_fn)(int num, int slot, int func);
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@ -493,27 +467,27 @@ static const struct intel_stolen_funcs i865_stolen_funcs __initconst = {
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};
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static const struct intel_stolen_funcs gen3_stolen_funcs __initconst = {
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.base = intel_stolen_base,
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.base = gen3_stolen_base,
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.size = gen3_stolen_size,
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};
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static const struct intel_stolen_funcs gen6_stolen_funcs __initconst = {
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.base = intel_stolen_base,
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.base = gen3_stolen_base,
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.size = gen6_stolen_size,
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};
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static const struct intel_stolen_funcs gen8_stolen_funcs __initconst = {
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.base = intel_stolen_base,
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.base = gen3_stolen_base,
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.size = gen8_stolen_size,
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};
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static const struct intel_stolen_funcs gen9_stolen_funcs __initconst = {
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.base = intel_stolen_base,
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.base = gen3_stolen_base,
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.size = gen9_stolen_size,
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};
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static const struct intel_stolen_funcs chv_stolen_funcs __initconst = {
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.base = intel_stolen_base,
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.base = gen3_stolen_base,
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.size = chv_stolen_size,
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};
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@ -554,7 +528,7 @@ static void __init intel_graphics_stolen(int num, int slot, int func)
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{
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size_t size;
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int i;
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u32 start;
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phys_addr_t start;
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u16 device, subvendor, subdevice;
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device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
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@ -569,8 +543,8 @@ static void __init intel_graphics_stolen(int num, int slot, int func)
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size = stolen_funcs->size(num, slot, func);
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start = stolen_funcs->base(num, slot, func, size);
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if (size && start) {
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printk(KERN_INFO "Reserving Intel graphics stolen memory at 0x%x-0x%x\n",
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start, start + (u32)size - 1);
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printk(KERN_INFO "Reserving Intel graphics stolen memory at 0x%llx-0x%llx\n",
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start, start + size - 1);
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/* Mark this space as reserved */
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e820_add_region(start, size, E820_RESERVED);
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sanitize_e820_map(e820.map,
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@ -109,9 +109,9 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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if (INTEL_INFO(dev)->gen >= 3) {
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u32 bsm;
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pci_read_config_dword(dev->pdev, BSM, &bsm);
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pci_read_config_dword(dev->pdev, INTEL_BSM, &bsm);
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base = bsm & BSM_MASK;
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base = bsm & INTEL_BSM_MASK;
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} else if (IS_I865G(dev)) {
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u16 toud = 0;
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||||
|
||||
@ -92,4 +92,7 @@ extern bool i915_gpu_turbo_disable(void);
|
||||
#define I845_TSEG_SIZE_512K (2 << 1)
|
||||
#define I845_TSEG_SIZE_1M (3 << 1)
|
||||
|
||||
#define INTEL_BSM 0x5c
|
||||
#define INTEL_BSM_MASK (0xFFFF << 20)
|
||||
|
||||
#endif /* _I915_DRM_H_ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user