forked from Minki/linux
powerpc/qe: Fix few build errors with CONFIG_QUICC_ENGINE=n
Some 83xx boards were not ready for the optional QUICC Engine support. This patch fixes following build errors: arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb308): undefined reference to `par_io_data_set' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb334): undefined reference to `par_io_data_set' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb408): undefined reference to `qe_ic_get_high_irq' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb478): undefined reference to `qe_ic_get_low_irq' arch/powerpc/platforms/built-in.o: In function `mpc832x_spi_init': mpc832x_rdb.c:(.init.text+0x574c): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x5768): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x5784): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x57a0): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x57bc): undefined reference to `par_io_config_pin' arch/powerpc/platforms/built-in.o:mpc832x_rdb.c:(.init.text+0x57d8): more undefined references to `par_io_config_pin' follow arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_init_IRQ': mpc836x_rdk.c:(.init.text+0x5e84): undefined reference to `qe_ic_init' arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_setup_arch': mpc836x_rdk.c:(.init.text+0x5f10): undefined reference to `qe_reset' make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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20cfb41ba8
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@ -86,7 +86,11 @@ static inline bool qe_clock_is_brg(enum qe_clock clk)
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extern spinlock_t cmxgcr_lock;
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/* Export QE common operations */
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#ifdef CONFIG_QUICC_ENGINE
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extern void __init qe_reset(void);
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#else
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static inline void qe_reset(void) {}
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#endif
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/* QE PIO */
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#define QE_PIO_PINS 32
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@ -103,16 +107,24 @@ struct qe_pio_regs {
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#endif
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};
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extern int par_io_init(struct device_node *np);
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extern int par_io_of_config(struct device_node *np);
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#define QE_PIO_DIR_IN 2
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#define QE_PIO_DIR_OUT 1
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extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin,
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int dir, int open_drain, int assignment,
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int has_irq);
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#ifdef CONFIG_QUICC_ENGINE
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extern int par_io_init(struct device_node *np);
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extern int par_io_of_config(struct device_node *np);
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extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
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int assignment, int has_irq);
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extern int par_io_data_set(u8 port, u8 pin, u8 val);
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#else
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static inline int par_io_init(struct device_node *np) { return -ENOSYS; }
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static inline int par_io_of_config(struct device_node *np) { return -ENOSYS; }
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static inline int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
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int assignment, int has_irq) { return -ENOSYS; }
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static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; }
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#endif /* CONFIG_QUICC_ENGINE */
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/*
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* Pin multiplexing functions.
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@ -17,6 +17,9 @@
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#include <linux/irq.h>
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struct device_node;
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struct qe_ic;
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#define NUM_OF_QE_IC_GROUPS 6
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/* Flags when we init the QE IC */
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@ -54,17 +57,27 @@ enum qe_ic_grp_id {
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QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */
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};
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#ifdef CONFIG_QUICC_ENGINE
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void qe_ic_init(struct device_node *node, unsigned int flags,
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void (*low_handler)(unsigned int irq, struct irq_desc *desc),
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void (*high_handler)(unsigned int irq, struct irq_desc *desc));
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unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
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unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
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#else
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static inline void qe_ic_init(struct device_node *node, unsigned int flags,
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void (*low_handler)(unsigned int irq, struct irq_desc *desc),
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void (*high_handler)(unsigned int irq, struct irq_desc *desc))
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{}
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static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
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{ return 0; }
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static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
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{ return 0; }
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#endif /* CONFIG_QUICC_ENGINE */
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void qe_ic_set_highest_priority(unsigned int virq, int high);
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int qe_ic_set_priority(unsigned int virq, unsigned int priority);
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int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
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struct qe_ic;
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unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
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unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
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static inline void qe_ic_cascade_low_ipic(unsigned int irq,
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struct irq_desc *desc)
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{
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