forked from Minki/linux
b43: Optimize DMA buffers
In the old days we used one slot per frame. But when we changed that to 2, we didn't raise the overall slot count. Which resulted in an effective division of two to the number of slots. Double the number of TX slots, so we have an effective hardware queue of 128 frames per QoS queue. Also optimize the TX header cache handling. We don't need a cached TX header for slots that will never carry an actual header. So we reduce the memory consumption of the cache by 50%. So as a net result we end up with more or less the same memory usage before and after this patch (except a few tiny meta structures), but have twice the number of TX slots available. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -41,6 +41,12 @@
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#include <asm/div64.h>
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/* Required number of TX DMA slots per TX frame.
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* This currently is 2, because we put the header and the ieee80211 frame
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* into separate slots. */
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#define TX_SLOTS_PER_FRAME 2
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/* 32bit DMA ops. */
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static
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struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring,
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@ -574,12 +580,11 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
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return -ENOMEM;
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dmaaddr = map_descbuffer(ring, skb->data,
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ring->rx_buffersize, 0);
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}
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if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
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b43err(ring->dev->wl, "RX DMA buffer allocation failed\n");
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dev_kfree_skb_any(skb);
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return -EIO;
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if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
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b43err(ring->dev->wl, "RX DMA buffer allocation failed\n");
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dev_kfree_skb_any(skb);
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return -EIO;
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}
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}
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meta->skb = skb;
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@ -837,7 +842,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
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#endif
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if (for_tx) {
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ring->txhdr_cache = kcalloc(ring->nr_slots,
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ring->txhdr_cache = kcalloc(ring->nr_slots / TX_SLOTS_PER_FRAME,
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b43_txhdr_size(dev),
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GFP_KERNEL);
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if (!ring->txhdr_cache)
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@ -853,7 +858,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
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b43_txhdr_size(dev), 1)) {
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/* ugh realloc */
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kfree(ring->txhdr_cache);
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ring->txhdr_cache = kcalloc(ring->nr_slots,
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ring->txhdr_cache = kcalloc(ring->nr_slots / TX_SLOTS_PER_FRAME,
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b43_txhdr_size(dev),
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GFP_KERNEL | GFP_DMA);
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if (!ring->txhdr_cache)
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@ -1144,7 +1149,10 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
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u16 cookie;
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size_t hdrsize = b43_txhdr_size(ring->dev);
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#define SLOTS_PER_PACKET 2
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/* Important note: If the number of used DMA slots per TX frame
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* is changed here, the TX_SLOTS_PER_FRAME definition at the top of
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* the file has to be updated, too!
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*/
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old_top_slot = ring->current_slot;
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old_used_slots = ring->used_slots;
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@ -1154,7 +1162,7 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
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desc = ops->idx2desc(ring, slot, &meta_hdr);
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memset(meta_hdr, 0, sizeof(*meta_hdr));
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header = &(ring->txhdr_cache[slot * hdrsize]);
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header = &(ring->txhdr_cache[(slot / TX_SLOTS_PER_FRAME) * hdrsize]);
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cookie = generate_cookie(ring, slot);
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err = b43_generate_txhdr(ring->dev, header,
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skb->data, skb->len, info, cookie);
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@ -1308,7 +1316,7 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
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* That would be a mac80211 bug. */
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B43_WARN_ON(ring->stopped);
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if (unlikely(free_slots(ring) < SLOTS_PER_PACKET)) {
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if (unlikely(free_slots(ring) < TX_SLOTS_PER_FRAME)) {
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b43warn(dev->wl, "DMA queue overflow\n");
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err = -ENOSPC;
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goto out_unlock;
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@ -1332,7 +1340,7 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
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goto out_unlock;
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}
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ring->nr_tx_packets++;
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if ((free_slots(ring) < SLOTS_PER_PACKET) ||
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if ((free_slots(ring) < TX_SLOTS_PER_FRAME) ||
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should_inject_overflow(ring)) {
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/* This TX ring is full. */
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ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
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@ -1416,7 +1424,7 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
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}
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dev->stats.last_tx = jiffies;
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if (ring->stopped) {
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B43_WARN_ON(free_slots(ring) < SLOTS_PER_PACKET);
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B43_WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME);
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ieee80211_wake_queue(dev->wl->hw, ring->queue_prio);
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ring->stopped = 0;
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if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
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@ -1439,8 +1447,8 @@ void b43_dma_get_tx_stats(struct b43_wldev *dev,
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ring = select_ring_by_priority(dev, i);
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spin_lock_irqsave(&ring->lock, flags);
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stats[i].len = ring->used_slots / SLOTS_PER_PACKET;
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stats[i].limit = ring->nr_slots / SLOTS_PER_PACKET;
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stats[i].len = ring->used_slots / TX_SLOTS_PER_FRAME;
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stats[i].limit = ring->nr_slots / TX_SLOTS_PER_FRAME;
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stats[i].count = ring->nr_tx_packets;
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spin_unlock_irqrestore(&ring->lock, flags);
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}
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@ -162,7 +162,7 @@ struct b43_dmadesc_generic {
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#define B43_DMA0_RX_FRAMEOFFSET 30
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/* DMA engine tuning knobs */
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#define B43_TXRING_SLOTS 128
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#define B43_TXRING_SLOTS 256
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#define B43_RXRING_SLOTS 64
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#define B43_DMA0_RX_BUFFERSIZE IEEE80211_MAX_FRAME_LEN
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@ -212,7 +212,7 @@ struct b43_dmaring {
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void *descbase;
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/* Meta data about all descriptors. */
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struct b43_dmadesc_meta *meta;
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/* Cache of TX headers for each slot.
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/* Cache of TX headers for each TX frame.
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* This is to avoid an allocation on each TX.
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* This is NULL for an RX ring.
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*/
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