forked from Minki/linux
net: ena: explicit casting and initialization, and clearer error handling
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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cb36bb36e1
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bd791175a6
@ -235,7 +235,7 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu
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tail_masked = admin_queue->sq.tail & queue_size_mask;
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tail_masked = admin_queue->sq.tail & queue_size_mask;
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/* In case of queue FULL */
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/* In case of queue FULL */
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cnt = atomic_read(&admin_queue->outstanding_cmds);
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cnt = (u16)atomic_read(&admin_queue->outstanding_cmds);
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if (cnt >= admin_queue->q_depth) {
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if (cnt >= admin_queue->q_depth) {
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pr_debug("admin queue is full.\n");
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pr_debug("admin queue is full.\n");
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admin_queue->stats.out_of_space++;
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admin_queue->stats.out_of_space++;
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@ -304,7 +304,7 @@ static struct ena_comp_ctx *ena_com_submit_admin_cmd(struct ena_com_admin_queue
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struct ena_admin_acq_entry *comp,
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struct ena_admin_acq_entry *comp,
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size_t comp_size_in_bytes)
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size_t comp_size_in_bytes)
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{
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{
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unsigned long flags;
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unsigned long flags = 0;
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struct ena_comp_ctx *comp_ctx;
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struct ena_comp_ctx *comp_ctx;
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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@ -332,7 +332,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,
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memset(&io_sq->desc_addr, 0x0, sizeof(io_sq->desc_addr));
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memset(&io_sq->desc_addr, 0x0, sizeof(io_sq->desc_addr));
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io_sq->dma_addr_bits = ena_dev->dma_addr_bits;
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io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits;
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io_sq->desc_entry_size =
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io_sq->desc_entry_size =
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(io_sq->direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ?
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(io_sq->direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ?
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sizeof(struct ena_eth_io_tx_desc) :
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sizeof(struct ena_eth_io_tx_desc) :
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@ -486,7 +486,7 @@ static void ena_com_handle_admin_completion(struct ena_com_admin_queue *admin_qu
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/* Go over all the completions */
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/* Go over all the completions */
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while ((READ_ONCE(cqe->acq_common_descriptor.flags) &
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while ((READ_ONCE(cqe->acq_common_descriptor.flags) &
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ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {
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ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {
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/* Do not read the rest of the completion entry before the
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/* Do not read the rest of the completion entry before the
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* phase bit was validated
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* phase bit was validated
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*/
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*/
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@ -537,7 +537,8 @@ static int ena_com_comp_status_to_errno(u8 comp_status)
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static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_ctx,
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static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_ctx,
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struct ena_com_admin_queue *admin_queue)
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struct ena_com_admin_queue *admin_queue)
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{
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{
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unsigned long flags, timeout;
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unsigned long flags = 0;
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unsigned long timeout;
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int ret;
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int ret;
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timeout = jiffies + usecs_to_jiffies(admin_queue->completion_timeout);
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timeout = jiffies + usecs_to_jiffies(admin_queue->completion_timeout);
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@ -736,7 +737,7 @@ static int ena_com_config_llq_info(struct ena_com_dev *ena_dev,
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static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *comp_ctx,
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static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *comp_ctx,
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struct ena_com_admin_queue *admin_queue)
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struct ena_com_admin_queue *admin_queue)
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{
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{
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unsigned long flags;
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unsigned long flags = 0;
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int ret;
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int ret;
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wait_for_completion_timeout(&comp_ctx->wait_event,
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wait_for_completion_timeout(&comp_ctx->wait_event,
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@ -782,7 +783,7 @@ static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset)
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volatile struct ena_admin_ena_mmio_req_read_less_resp *read_resp =
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volatile struct ena_admin_ena_mmio_req_read_less_resp *read_resp =
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mmio_read->read_resp;
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mmio_read->read_resp;
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u32 mmio_read_reg, ret, i;
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u32 mmio_read_reg, ret, i;
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unsigned long flags;
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unsigned long flags = 0;
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u32 timeout = mmio_read->reg_read_to;
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u32 timeout = mmio_read->reg_read_to;
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might_sleep();
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might_sleep();
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@ -1426,7 +1427,7 @@ void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev)
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void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev)
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void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev)
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{
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{
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struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue;
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struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue;
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unsigned long flags;
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unsigned long flags = 0;
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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while (atomic_read(&admin_queue->outstanding_cmds) != 0) {
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while (atomic_read(&admin_queue->outstanding_cmds) != 0) {
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@ -1470,7 +1471,7 @@ bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev)
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void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state)
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void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state)
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{
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{
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struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue;
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struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue;
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unsigned long flags;
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unsigned long flags = 0;
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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spin_lock_irqsave(&admin_queue->q_lock, flags);
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ena_dev->admin_queue.running_state = state;
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ena_dev->admin_queue.running_state = state;
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@ -1504,7 +1505,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag)
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}
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}
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if ((get_resp.u.aenq.supported_groups & groups_flag) != groups_flag) {
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if ((get_resp.u.aenq.supported_groups & groups_flag) != groups_flag) {
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pr_warn("Trying to set unsupported aenq events. supported flag: %x asked flag: %x\n",
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pr_warn("Trying to set unsupported aenq events. supported flag: 0x%x asked flag: 0x%x\n",
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get_resp.u.aenq.supported_groups, groups_flag);
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get_resp.u.aenq.supported_groups, groups_flag);
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return -EOPNOTSUPP;
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return -EOPNOTSUPP;
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}
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}
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@ -1652,7 +1653,7 @@ int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev)
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sizeof(*mmio_read->read_resp),
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sizeof(*mmio_read->read_resp),
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&mmio_read->read_resp_dma_addr, GFP_KERNEL);
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&mmio_read->read_resp_dma_addr, GFP_KERNEL);
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if (unlikely(!mmio_read->read_resp))
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if (unlikely(!mmio_read->read_resp))
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return -ENOMEM;
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goto err;
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ena_com_mmio_reg_read_request_write_dev_addr(ena_dev);
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ena_com_mmio_reg_read_request_write_dev_addr(ena_dev);
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@ -1661,6 +1662,10 @@ int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev)
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mmio_read->readless_supported = true;
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mmio_read->readless_supported = true;
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return 0;
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return 0;
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err:
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return -ENOMEM;
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}
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}
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void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported)
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void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported)
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@ -1961,6 +1966,7 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data)
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struct ena_admin_aenq_entry *aenq_e;
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struct ena_admin_aenq_entry *aenq_e;
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struct ena_admin_aenq_common_desc *aenq_common;
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struct ena_admin_aenq_common_desc *aenq_common;
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struct ena_com_aenq *aenq = &dev->aenq;
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struct ena_com_aenq *aenq = &dev->aenq;
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unsigned long long timestamp;
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ena_aenq_handler handler_cb;
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ena_aenq_handler handler_cb;
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u16 masked_head, processed = 0;
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u16 masked_head, processed = 0;
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u8 phase;
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u8 phase;
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@ -1978,10 +1984,11 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data)
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*/
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*/
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dma_rmb();
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dma_rmb();
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timestamp =
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(unsigned long long)aenq_common->timestamp_low |
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((unsigned long long)aenq_common->timestamp_high << 32);
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pr_debug("AENQ! Group[%x] Syndrom[%x] timestamp: [%llus]\n",
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pr_debug("AENQ! Group[%x] Syndrom[%x] timestamp: [%llus]\n",
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aenq_common->group, aenq_common->syndrom,
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aenq_common->group, aenq_common->syndrom, timestamp);
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(u64)aenq_common->timestamp_low +
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((u64)aenq_common->timestamp_high << 32));
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/* Handle specific event*/
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/* Handle specific event*/
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handler_cb = ena_com_get_specific_aenq_cb(dev,
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handler_cb = ena_com_get_specific_aenq_cb(dev,
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@ -2623,8 +2630,8 @@ int ena_com_allocate_host_info(struct ena_com_dev *ena_dev)
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if (unlikely(!host_attr->host_info))
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if (unlikely(!host_attr->host_info))
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return -ENOMEM;
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return -ENOMEM;
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host_attr->host_info->ena_spec_version =
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host_attr->host_info->ena_spec_version = ((ENA_COMMON_SPEC_VERSION_MAJOR <<
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((ENA_COMMON_SPEC_VERSION_MAJOR << ENA_REGS_VERSION_MAJOR_VERSION_SHIFT) |
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ENA_REGS_VERSION_MAJOR_VERSION_SHIFT) |
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(ENA_COMMON_SPEC_VERSION_MINOR));
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(ENA_COMMON_SPEC_VERSION_MINOR));
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return 0;
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return 0;
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@ -2599,15 +2599,14 @@ static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
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dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
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dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
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adapter->dev_up_before_reset = dev_up;
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adapter->dev_up_before_reset = dev_up;
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if (!graceful)
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if (!graceful)
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ena_com_set_admin_running_state(ena_dev, false);
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ena_com_set_admin_running_state(ena_dev, false);
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if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
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if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
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ena_down(adapter);
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ena_down(adapter);
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/* Before releasing the ENA resources, a device reset is required.
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/* Stop the device from sending AENQ events (in case reset flag is set
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* (to prevent the device from accessing them).
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* and device is up, ena_close already reset the device
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* In case the reset flag is set and the device is up, ena_down()
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* In case the reset flag is set and the device is up, ena_down()
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* already perform the reset, so it can be skipped.
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* already perform the reset, so it can be skipped.
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*/
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*/
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@ -61,6 +61,17 @@
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#define ENA_ADMIN_MSIX_VEC 1
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#define ENA_ADMIN_MSIX_VEC 1
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#define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues))
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#define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues))
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/* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the
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* driver passes 0.
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* Since the max packet size the ENA handles is ~9kB limit the buffer length to
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* 16kB.
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*/
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#if PAGE_SIZE > SZ_16K
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#define ENA_PAGE_SIZE SZ_16K
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#else
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#define ENA_PAGE_SIZE PAGE_SIZE
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#endif
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#define ENA_MIN_MSIX_VEC 2
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#define ENA_MIN_MSIX_VEC 2
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#define ENA_REG_BAR 0
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#define ENA_REG_BAR 0
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@ -362,15 +373,4 @@ void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
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int ena_get_sset_count(struct net_device *netdev, int sset);
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int ena_get_sset_count(struct net_device *netdev, int sset);
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/* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the
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* driver passas 0.
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* Since the max packet size the ENA handles is ~9kB limit the buffer length to
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* 16kB.
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*/
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#if PAGE_SIZE > SZ_16K
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#define ENA_PAGE_SIZE SZ_16K
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#else
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#define ENA_PAGE_SIZE PAGE_SIZE
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#endif
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#endif /* !(ENA_H) */
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#endif /* !(ENA_H) */
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