forked from Minki/linux
[BNX2]: Add PHY loopback test
Enhance the ethtool loopback test with PHY loopback test. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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972ec0d4ba
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bc5a0690e9
@ -1331,6 +1331,38 @@ bnx2_set_mac_loopback(struct bnx2 *bp)
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return 0;
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}
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static int bnx2_test_link(struct bnx2 *);
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static int
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bnx2_set_phy_loopback(struct bnx2 *bp)
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{
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u32 mac_mode;
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int rc, i;
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spin_lock_bh(&bp->phy_lock);
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rc = bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX |
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BMCR_SPEED1000);
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spin_unlock_bh(&bp->phy_lock);
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if (rc)
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return rc;
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for (i = 0; i < 10; i++) {
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if (bnx2_test_link(bp) == 0)
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break;
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udelay(10);
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}
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mac_mode = REG_RD(bp, BNX2_EMAC_MODE);
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mac_mode &= ~(BNX2_EMAC_MODE_PORT | BNX2_EMAC_MODE_HALF_DUPLEX |
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BNX2_EMAC_MODE_MAC_LOOP | BNX2_EMAC_MODE_FORCE_LINK |
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BNX2_EMAC_MODE_25G);
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mac_mode |= BNX2_EMAC_MODE_PORT_GMII;
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REG_WR(bp, BNX2_EMAC_MODE, mac_mode);
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bp->link_up = 1;
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return 0;
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}
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static int
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bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int silent)
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{
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@ -3907,26 +3939,33 @@ bnx2_test_memory(struct bnx2 *bp)
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return ret;
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}
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#define BNX2_MAC_LOOPBACK 0
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#define BNX2_PHY_LOOPBACK 1
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static int
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bnx2_test_loopback(struct bnx2 *bp)
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bnx2_run_loopback(struct bnx2 *bp, int loopback_mode)
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{
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unsigned int pkt_size, num_pkts, i;
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struct sk_buff *skb, *rx_skb;
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unsigned char *packet;
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u16 rx_start_idx, rx_idx, send_idx;
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u32 send_bseq, val;
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u16 rx_start_idx, rx_idx;
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u32 val;
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dma_addr_t map;
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struct tx_bd *txbd;
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struct sw_bd *rx_buf;
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struct l2_fhdr *rx_hdr;
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int ret = -ENODEV;
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if (!netif_running(bp->dev))
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return -ENODEV;
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if (loopback_mode == BNX2_MAC_LOOPBACK) {
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bp->loopback = MAC_LOOPBACK;
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bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_DIAG);
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bnx2_set_mac_loopback(bp);
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}
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else if (loopback_mode == BNX2_PHY_LOOPBACK) {
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bp->loopback = 0;
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bnx2_set_phy_loopback(bp);
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}
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else
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return -EINVAL;
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pkt_size = 1514;
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skb = dev_alloc_skb(pkt_size);
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@ -3948,11 +3987,9 @@ bnx2_test_loopback(struct bnx2 *bp)
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udelay(5);
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rx_start_idx = bp->status_blk->status_rx_quick_consumer_index0;
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send_idx = 0;
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send_bseq = 0;
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num_pkts = 0;
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txbd = &bp->tx_desc_ring[send_idx];
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txbd = &bp->tx_desc_ring[TX_RING_IDX(bp->tx_prod)];
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txbd->tx_bd_haddr_hi = (u64) map >> 32;
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txbd->tx_bd_haddr_lo = (u64) map & 0xffffffff;
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@ -3960,13 +3997,11 @@ bnx2_test_loopback(struct bnx2 *bp)
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txbd->tx_bd_vlan_tag_flags = TX_BD_FLAGS_START | TX_BD_FLAGS_END;
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num_pkts++;
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send_idx = NEXT_TX_BD(send_idx);
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send_bseq += pkt_size;
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REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, send_idx);
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REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, send_bseq);
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bp->tx_prod = NEXT_TX_BD(bp->tx_prod);
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bp->tx_prod_bseq += pkt_size;
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REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, bp->tx_prod);
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REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
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udelay(100);
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@ -3979,7 +4014,7 @@ bnx2_test_loopback(struct bnx2 *bp)
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pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE);
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dev_kfree_skb_irq(skb);
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if (bp->status_blk->status_tx_quick_consumer_index0 != send_idx) {
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if (bp->status_blk->status_tx_quick_consumer_index0 != bp->tx_prod) {
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goto loopback_test_done;
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}
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@ -4025,6 +4060,30 @@ loopback_test_done:
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return ret;
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}
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#define BNX2_MAC_LOOPBACK_FAILED 1
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#define BNX2_PHY_LOOPBACK_FAILED 2
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#define BNX2_LOOPBACK_FAILED (BNX2_MAC_LOOPBACK_FAILED | \
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BNX2_PHY_LOOPBACK_FAILED)
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static int
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bnx2_test_loopback(struct bnx2 *bp)
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{
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int rc = 0;
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if (!netif_running(bp->dev))
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return BNX2_LOOPBACK_FAILED;
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bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET);
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spin_lock_bh(&bp->phy_lock);
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bnx2_init_phy(bp);
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spin_unlock_bh(&bp->phy_lock);
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if (bnx2_run_loopback(bp, BNX2_MAC_LOOPBACK))
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rc |= BNX2_MAC_LOOPBACK_FAILED;
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if (bnx2_run_loopback(bp, BNX2_PHY_LOOPBACK))
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rc |= BNX2_PHY_LOOPBACK_FAILED;
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return rc;
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}
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#define NVRAM_SIZE 0x200
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#define CRC32_RESIDUAL 0xdebb20e3
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@ -5169,10 +5228,8 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
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buf[1] = 1;
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etest->flags |= ETH_TEST_FL_FAILED;
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}
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if (bnx2_test_loopback(bp) != 0) {
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buf[2] = 1;
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if ((buf[2] = bnx2_test_loopback(bp)) != 0)
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etest->flags |= ETH_TEST_FL_FAILED;
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}
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if (!netif_running(bp->dev)) {
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bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
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