forked from Minki/linux
can: add the driver for Analog Devices Blackfin on-chip CAN controllers
Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: H.J. Oertel <oe@port.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Barry Song
David S. Miller
parent
c20a66f474
commit
bbb84619c3
@ -54,6 +54,15 @@ config CAN_MCP251X
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---help---
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Driver for the Microchip MCP251x SPI CAN controllers.
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config CAN_BFIN
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depends on CAN_DEV && (BF534 || BF536 || BF537 || BF538 || BF539 || BF54x)
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tristate "Analog Devices Blackfin on-chip CAN"
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---help---
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Driver for the Analog Devices Blackfin on-chip CAN controllers
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To compile this driver as a module, choose M here: the
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module will be called bfin_can.
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source "drivers/net/can/mscan/Kconfig"
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source "drivers/net/can/sja1000/Kconfig"
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@ -14,5 +14,6 @@ obj-$(CONFIG_CAN_MSCAN) += mscan/
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obj-$(CONFIG_CAN_AT91) += at91_can.o
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obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
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obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
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obj-$(CONFIG_CAN_BFIN) += bfin_can.o
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ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
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783
drivers/net/can/bfin_can.c
Normal file
783
drivers/net/can/bfin_can.c
Normal file
@ -0,0 +1,783 @@
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/*
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* Blackfin On-Chip CAN Driver
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*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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#include <linux/netdevice.h>
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#include <linux/skbuff.h>
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#include <linux/platform_device.h>
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#include <linux/can.h>
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#include <linux/can/dev.h>
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#include <linux/can/error.h>
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#include <asm/portmux.h>
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#define DRV_NAME "bfin_can"
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#define BFIN_CAN_TIMEOUT 100
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/*
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* transmit and receive channels
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*/
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#define TRANSMIT_CHL 24
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#define RECEIVE_STD_CHL 0
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#define RECEIVE_EXT_CHL 4
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#define RECEIVE_RTR_CHL 8
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#define RECEIVE_EXT_RTR_CHL 12
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#define MAX_CHL_NUMBER 32
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/*
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* bfin can registers layout
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*/
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struct bfin_can_mask_regs {
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u16 aml;
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u16 dummy1;
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u16 amh;
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u16 dummy2;
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};
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struct bfin_can_channel_regs {
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u16 data[8];
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u16 dlc;
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u16 dummy1;
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u16 tsv;
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u16 dummy2;
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u16 id0;
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u16 dummy3;
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u16 id1;
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u16 dummy4;
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};
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struct bfin_can_regs {
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/*
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* global control and status registers
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*/
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u16 mc1; /* offset 0 */
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u16 dummy1;
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u16 md1; /* offset 4 */
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u16 rsv1[13];
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u16 mbtif1; /* offset 0x20 */
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u16 dummy2;
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u16 mbrif1; /* offset 0x24 */
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u16 dummy3;
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u16 mbim1; /* offset 0x28 */
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u16 rsv2[11];
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u16 mc2; /* offset 0x40 */
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u16 dummy4;
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u16 md2; /* offset 0x44 */
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u16 dummy5;
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u16 trs2; /* offset 0x48 */
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u16 rsv3[11];
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u16 mbtif2; /* offset 0x60 */
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u16 dummy6;
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u16 mbrif2; /* offset 0x64 */
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u16 dummy7;
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u16 mbim2; /* offset 0x68 */
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u16 rsv4[11];
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u16 clk; /* offset 0x80 */
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u16 dummy8;
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u16 timing; /* offset 0x84 */
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u16 rsv5[3];
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u16 status; /* offset 0x8c */
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u16 dummy9;
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u16 cec; /* offset 0x90 */
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u16 dummy10;
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u16 gis; /* offset 0x94 */
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u16 dummy11;
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u16 gim; /* offset 0x98 */
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u16 rsv6[3];
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u16 ctrl; /* offset 0xa0 */
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u16 dummy12;
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u16 intr; /* offset 0xa4 */
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u16 rsv7[7];
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u16 esr; /* offset 0xb4 */
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u16 rsv8[37];
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/*
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* channel(mailbox) mask and message registers
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*/
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struct bfin_can_mask_regs msk[MAX_CHL_NUMBER]; /* offset 0x100 */
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struct bfin_can_channel_regs chl[MAX_CHL_NUMBER]; /* offset 0x200 */
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};
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/*
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* bfin can private data
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*/
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struct bfin_can_priv {
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struct can_priv can; /* must be the first member */
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struct net_device *dev;
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void __iomem *membase;
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int rx_irq;
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int tx_irq;
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int err_irq;
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unsigned short *pin_list;
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};
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/*
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* bfin can timing parameters
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*/
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static struct can_bittiming_const bfin_can_bittiming_const = {
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.name = DRV_NAME,
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.tseg1_min = 1,
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.tseg1_max = 16,
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.tseg2_min = 1,
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.tseg2_max = 8,
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.sjw_max = 4,
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/*
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* Although the BRP field can be set to any value, it is recommended
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* that the value be greater than or equal to 4, as restrictions
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* apply to the bit timing configuration when BRP is less than 4.
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*/
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.brp_min = 4,
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.brp_max = 1024,
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.brp_inc = 1,
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};
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static int bfin_can_set_bittiming(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_bittiming *bt = &priv->can.bittiming;
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u16 clk, timing;
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clk = bt->brp - 1;
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timing = ((bt->sjw - 1) << 8) | (bt->prop_seg + bt->phase_seg1 - 1) |
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((bt->phase_seg2 - 1) << 4);
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/*
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* If the SAM bit is set, the input signal is oversampled three times
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* at the SCLK rate.
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*/
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if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
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timing |= SAM;
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bfin_write16(®->clk, clk);
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bfin_write16(®->timing, timing);
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dev_info(dev->dev.parent, "setting CLOCK=0x%04x TIMING=0x%04x\n",
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clk, timing);
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return 0;
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}
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static void bfin_can_set_reset_mode(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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int timeout = BFIN_CAN_TIMEOUT;
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int i;
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/* disable interrupts */
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bfin_write16(®->mbim1, 0);
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bfin_write16(®->mbim2, 0);
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bfin_write16(®->gim, 0);
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/* reset can and enter configuration mode */
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bfin_write16(®->ctrl, SRS | CCR);
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SSYNC();
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bfin_write16(®->ctrl, CCR);
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SSYNC();
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while (!(bfin_read16(®->ctrl) & CCA)) {
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udelay(10);
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if (--timeout == 0) {
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dev_err(dev->dev.parent,
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"fail to enter configuration mode\n");
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BUG();
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}
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}
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/*
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* All mailbox configurations are marked as inactive
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* by writing to CAN Mailbox Configuration Registers 1 and 2
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* For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled
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*/
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bfin_write16(®->mc1, 0);
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bfin_write16(®->mc2, 0);
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/* Set Mailbox Direction */
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bfin_write16(®->md1, 0xFFFF); /* mailbox 1-16 are RX */
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bfin_write16(®->md2, 0); /* mailbox 17-32 are TX */
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/* RECEIVE_STD_CHL */
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for (i = 0; i < 2; i++) {
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bfin_write16(®->chl[RECEIVE_STD_CHL + i].id0, 0);
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bfin_write16(®->chl[RECEIVE_STD_CHL + i].id1, AME);
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bfin_write16(®->chl[RECEIVE_STD_CHL + i].dlc, 0);
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bfin_write16(®->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF);
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bfin_write16(®->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF);
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}
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/* RECEIVE_EXT_CHL */
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for (i = 0; i < 2; i++) {
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bfin_write16(®->chl[RECEIVE_EXT_CHL + i].id0, 0);
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bfin_write16(®->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE);
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bfin_write16(®->chl[RECEIVE_EXT_CHL + i].dlc, 0);
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bfin_write16(®->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF);
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bfin_write16(®->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF);
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}
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bfin_write16(®->mc2, BIT(TRANSMIT_CHL - 16));
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bfin_write16(®->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
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SSYNC();
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priv->can.state = CAN_STATE_STOPPED;
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}
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static void bfin_can_set_normal_mode(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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int timeout = BFIN_CAN_TIMEOUT;
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/*
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* leave configuration mode
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*/
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bfin_write16(®->ctrl, bfin_read16(®->ctrl) & ~CCR);
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while (bfin_read16(®->status) & CCA) {
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udelay(10);
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if (--timeout == 0) {
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dev_err(dev->dev.parent,
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"fail to leave configuration mode\n");
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BUG();
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}
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}
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/*
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* clear _All_ tx and rx interrupts
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*/
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bfin_write16(®->mbtif1, 0xFFFF);
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bfin_write16(®->mbtif2, 0xFFFF);
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bfin_write16(®->mbrif1, 0xFFFF);
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bfin_write16(®->mbrif2, 0xFFFF);
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/*
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* clear global interrupt status register
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*/
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bfin_write16(®->gis, 0x7FF); /* overwrites with '1' */
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/*
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* Initialize Interrupts
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* - set bits in the mailbox interrupt mask register
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* - global interrupt mask
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*/
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bfin_write16(®->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
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bfin_write16(®->mbim2, BIT(TRANSMIT_CHL - 16));
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bfin_write16(®->gim, EPIM | BOIM | RMLIM);
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SSYNC();
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}
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static void bfin_can_start(struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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/* enter reset mode */
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if (priv->can.state != CAN_STATE_STOPPED)
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bfin_can_set_reset_mode(dev);
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/* leave reset mode */
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bfin_can_set_normal_mode(dev);
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}
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static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode)
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{
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switch (mode) {
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case CAN_MODE_START:
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bfin_can_start(dev);
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if (netif_queue_stopped(dev))
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netif_wake_queue(dev);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_frame *cf = (struct can_frame *)skb->data;
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u8 dlc = cf->can_dlc;
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canid_t id = cf->can_id;
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u8 *data = cf->data;
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u16 val;
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int i;
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netif_stop_queue(dev);
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/* fill id */
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if (id & CAN_EFF_FLAG) {
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bfin_write16(®->chl[TRANSMIT_CHL].id0, id);
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if (id & CAN_RTR_FLAG)
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writew(((id & 0x1FFF0000) >> 16) | IDE | AME | RTR,
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®->chl[TRANSMIT_CHL].id1);
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else
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writew(((id & 0x1FFF0000) >> 16) | IDE | AME,
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®->chl[TRANSMIT_CHL].id1);
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} else {
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if (id & CAN_RTR_FLAG)
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writew((id << 2) | AME | RTR,
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®->chl[TRANSMIT_CHL].id1);
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else
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bfin_write16(®->chl[TRANSMIT_CHL].id1,
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(id << 2) | AME);
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}
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/* fill payload */
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for (i = 0; i < 8; i += 2) {
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val = ((7 - i) < dlc ? (data[7 - i]) : 0) +
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((6 - i) < dlc ? (data[6 - i] << 8) : 0);
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bfin_write16(®->chl[TRANSMIT_CHL].data[i], val);
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}
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/* fill data length code */
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bfin_write16(®->chl[TRANSMIT_CHL].dlc, dlc);
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dev->trans_start = jiffies;
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can_put_echo_skb(skb, dev, 0);
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/* set transmit request */
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bfin_write16(®->trs2, BIT(TRANSMIT_CHL - 16));
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return 0;
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}
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static void bfin_can_rx(struct net_device *dev, u16 isrc)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct net_device_stats *stats = &dev->stats;
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct can_frame *cf;
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struct sk_buff *skb;
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int obj;
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int i;
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u16 val;
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skb = alloc_can_skb(dev, &cf);
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if (skb == NULL)
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return;
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/* get id */
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if (isrc & BIT(RECEIVE_EXT_CHL)) {
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/* extended frame format (EFF) */
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cf->can_id = ((bfin_read16(®->chl[RECEIVE_EXT_CHL].id1)
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& 0x1FFF) << 16)
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+ bfin_read16(®->chl[RECEIVE_EXT_CHL].id0);
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cf->can_id |= CAN_EFF_FLAG;
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obj = RECEIVE_EXT_CHL;
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} else {
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/* standard frame format (SFF) */
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cf->can_id = (bfin_read16(®->chl[RECEIVE_STD_CHL].id1)
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& 0x1ffc) >> 2;
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obj = RECEIVE_STD_CHL;
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}
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if (bfin_read16(®->chl[obj].id1) & RTR)
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cf->can_id |= CAN_RTR_FLAG;
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/* get data length code */
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cf->can_dlc = bfin_read16(®->chl[obj].dlc);
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/* get payload */
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for (i = 0; i < 8; i += 2) {
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val = bfin_read16(®->chl[obj].data[i]);
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cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0;
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cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0;
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}
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netif_rx(skb);
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stats->rx_packets++;
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stats->rx_bytes += cf->can_dlc;
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}
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static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status)
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{
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struct bfin_can_priv *priv = netdev_priv(dev);
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struct bfin_can_regs __iomem *reg = priv->membase;
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struct net_device_stats *stats = &dev->stats;
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struct can_frame *cf;
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struct sk_buff *skb;
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enum can_state state = priv->can.state;
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skb = alloc_can_err_skb(dev, &cf);
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if (skb == NULL)
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return -ENOMEM;
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if (isrc & RMLIS) {
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/* data overrun interrupt */
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dev_dbg(dev->dev.parent, "data overrun interrupt\n");
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cf->can_id |= CAN_ERR_CRTL;
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cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
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stats->rx_over_errors++;
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stats->rx_errors++;
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}
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|
||||
if (isrc & BOIS) {
|
||||
dev_dbg(dev->dev.parent, "bus-off mode interrupt\n");
|
||||
state = CAN_STATE_BUS_OFF;
|
||||
cf->can_id |= CAN_ERR_BUSOFF;
|
||||
can_bus_off(dev);
|
||||
}
|
||||
|
||||
if (isrc & EPIS) {
|
||||
/* error passive interrupt */
|
||||
dev_dbg(dev->dev.parent, "error passive interrupt\n");
|
||||
state = CAN_STATE_ERROR_PASSIVE;
|
||||
}
|
||||
|
||||
if ((isrc & EWTIS) || (isrc & EWRIS)) {
|
||||
dev_dbg(dev->dev.parent,
|
||||
"Error Warning Transmit/Receive Interrupt\n");
|
||||
state = CAN_STATE_ERROR_WARNING;
|
||||
}
|
||||
|
||||
if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
|
||||
state == CAN_STATE_ERROR_PASSIVE)) {
|
||||
u16 cec = bfin_read16(®->cec);
|
||||
u8 rxerr = cec;
|
||||
u8 txerr = cec >> 8;
|
||||
|
||||
cf->can_id |= CAN_ERR_CRTL;
|
||||
if (state == CAN_STATE_ERROR_WARNING) {
|
||||
priv->can.can_stats.error_warning++;
|
||||
cf->data[1] = (txerr > rxerr) ?
|
||||
CAN_ERR_CRTL_TX_WARNING :
|
||||
CAN_ERR_CRTL_RX_WARNING;
|
||||
} else {
|
||||
priv->can.can_stats.error_passive++;
|
||||
cf->data[1] = (txerr > rxerr) ?
|
||||
CAN_ERR_CRTL_TX_PASSIVE :
|
||||
CAN_ERR_CRTL_RX_PASSIVE;
|
||||
}
|
||||
}
|
||||
|
||||
if (status) {
|
||||
priv->can.can_stats.bus_error++;
|
||||
|
||||
cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
|
||||
|
||||
if (status & BEF)
|
||||
cf->data[2] |= CAN_ERR_PROT_BIT;
|
||||
else if (status & FER)
|
||||
cf->data[2] |= CAN_ERR_PROT_FORM;
|
||||
else if (status & SER)
|
||||
cf->data[2] |= CAN_ERR_PROT_STUFF;
|
||||
else
|
||||
cf->data[2] |= CAN_ERR_PROT_UNSPEC;
|
||||
}
|
||||
|
||||
priv->can.state = state;
|
||||
|
||||
netif_rx(skb);
|
||||
|
||||
stats->rx_packets++;
|
||||
stats->rx_bytes += cf->can_dlc;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
irqreturn_t bfin_can_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct net_device *dev = dev_id;
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
struct bfin_can_regs __iomem *reg = priv->membase;
|
||||
struct net_device_stats *stats = &dev->stats;
|
||||
u16 status, isrc;
|
||||
|
||||
if ((irq == priv->tx_irq) && bfin_read16(®->mbtif2)) {
|
||||
/* transmission complete interrupt */
|
||||
bfin_write16(®->mbtif2, 0xFFFF);
|
||||
stats->tx_packets++;
|
||||
stats->tx_bytes += bfin_read16(®->chl[TRANSMIT_CHL].dlc);
|
||||
can_get_echo_skb(dev, 0);
|
||||
netif_wake_queue(dev);
|
||||
} else if ((irq == priv->rx_irq) && bfin_read16(®->mbrif1)) {
|
||||
/* receive interrupt */
|
||||
isrc = bfin_read16(®->mbrif1);
|
||||
bfin_write16(®->mbrif1, 0xFFFF);
|
||||
bfin_can_rx(dev, isrc);
|
||||
} else if ((irq == priv->err_irq) && bfin_read16(®->gis)) {
|
||||
/* error interrupt */
|
||||
isrc = bfin_read16(®->gis);
|
||||
status = bfin_read16(®->esr);
|
||||
bfin_write16(®->gis, 0x7FF);
|
||||
bfin_can_err(dev, isrc, status);
|
||||
} else {
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int bfin_can_open(struct net_device *dev)
|
||||
{
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
int err;
|
||||
|
||||
/* set chip into reset mode */
|
||||
bfin_can_set_reset_mode(dev);
|
||||
|
||||
/* common open */
|
||||
err = open_candev(dev);
|
||||
if (err)
|
||||
goto exit_open;
|
||||
|
||||
/* register interrupt handler */
|
||||
err = request_irq(priv->rx_irq, &bfin_can_interrupt, 0,
|
||||
"bfin-can-rx", dev);
|
||||
if (err)
|
||||
goto exit_rx_irq;
|
||||
err = request_irq(priv->tx_irq, &bfin_can_interrupt, 0,
|
||||
"bfin-can-tx", dev);
|
||||
if (err)
|
||||
goto exit_tx_irq;
|
||||
err = request_irq(priv->err_irq, &bfin_can_interrupt, 0,
|
||||
"bfin-can-err", dev);
|
||||
if (err)
|
||||
goto exit_err_irq;
|
||||
|
||||
bfin_can_start(dev);
|
||||
|
||||
netif_start_queue(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
exit_err_irq:
|
||||
free_irq(priv->tx_irq, dev);
|
||||
exit_tx_irq:
|
||||
free_irq(priv->rx_irq, dev);
|
||||
exit_rx_irq:
|
||||
close_candev(dev);
|
||||
exit_open:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int bfin_can_close(struct net_device *dev)
|
||||
{
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
|
||||
netif_stop_queue(dev);
|
||||
bfin_can_set_reset_mode(dev);
|
||||
|
||||
close_candev(dev);
|
||||
|
||||
free_irq(priv->rx_irq, dev);
|
||||
free_irq(priv->tx_irq, dev);
|
||||
free_irq(priv->err_irq, dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct net_device *alloc_bfin_candev(void)
|
||||
{
|
||||
struct net_device *dev;
|
||||
struct bfin_can_priv *priv;
|
||||
|
||||
dev = alloc_candev(sizeof(*priv));
|
||||
if (!dev)
|
||||
return NULL;
|
||||
|
||||
priv = netdev_priv(dev);
|
||||
|
||||
priv->dev = dev;
|
||||
priv->can.bittiming_const = &bfin_can_bittiming_const;
|
||||
priv->can.do_set_bittiming = bfin_can_set_bittiming;
|
||||
priv->can.do_set_mode = bfin_can_set_mode;
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
static const struct net_device_ops bfin_can_netdev_ops = {
|
||||
.ndo_open = bfin_can_open,
|
||||
.ndo_stop = bfin_can_close,
|
||||
.ndo_start_xmit = bfin_can_start_xmit,
|
||||
};
|
||||
|
||||
static int __devinit bfin_can_probe(struct platform_device *pdev)
|
||||
{
|
||||
int err;
|
||||
struct net_device *dev;
|
||||
struct bfin_can_priv *priv;
|
||||
struct resource *res_mem, *rx_irq, *tx_irq, *err_irq;
|
||||
unsigned short *pdata;
|
||||
|
||||
pdata = pdev->dev.platform_data;
|
||||
if (!pdata) {
|
||||
dev_err(&pdev->dev, "No platform data provided!\n");
|
||||
err = -EINVAL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
|
||||
err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2);
|
||||
if (!res_mem || !rx_irq || !tx_irq || !err_irq) {
|
||||
err = -EINVAL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res_mem->start, resource_size(res_mem),
|
||||
dev_name(&pdev->dev))) {
|
||||
err = -EBUSY;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
/* request peripheral pins */
|
||||
err = peripheral_request_list(pdata, dev_name(&pdev->dev));
|
||||
if (err)
|
||||
goto exit_mem_release;
|
||||
|
||||
dev = alloc_bfin_candev();
|
||||
if (!dev) {
|
||||
err = -ENOMEM;
|
||||
goto exit_peri_pin_free;
|
||||
}
|
||||
|
||||
priv = netdev_priv(dev);
|
||||
priv->membase = (void __iomem *)res_mem->start;
|
||||
priv->rx_irq = rx_irq->start;
|
||||
priv->tx_irq = tx_irq->start;
|
||||
priv->err_irq = err_irq->start;
|
||||
priv->pin_list = pdata;
|
||||
priv->can.clock.freq = get_sclk();
|
||||
|
||||
dev_set_drvdata(&pdev->dev, dev);
|
||||
SET_NETDEV_DEV(dev, &pdev->dev);
|
||||
|
||||
dev->flags |= IFF_ECHO; /* we support local echo */
|
||||
dev->netdev_ops = &bfin_can_netdev_ops;
|
||||
|
||||
bfin_can_set_reset_mode(dev);
|
||||
|
||||
err = register_candev(dev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "registering failed (err=%d)\n", err);
|
||||
goto exit_candev_free;
|
||||
}
|
||||
|
||||
dev_info(&pdev->dev,
|
||||
"%s device registered"
|
||||
"(®_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",
|
||||
DRV_NAME, (void *)priv->membase, priv->rx_irq,
|
||||
priv->tx_irq, priv->err_irq, priv->can.clock.freq);
|
||||
return 0;
|
||||
|
||||
exit_candev_free:
|
||||
free_candev(dev);
|
||||
exit_peri_pin_free:
|
||||
peripheral_free_list(pdata);
|
||||
exit_mem_release:
|
||||
release_mem_region(res_mem->start, resource_size(res_mem));
|
||||
exit:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __devexit bfin_can_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev = dev_get_drvdata(&pdev->dev);
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
struct resource *res;
|
||||
|
||||
bfin_can_set_reset_mode(dev);
|
||||
|
||||
unregister_candev(dev);
|
||||
|
||||
dev_set_drvdata(&pdev->dev, NULL);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
|
||||
peripheral_free_list(priv->pin_list);
|
||||
|
||||
free_candev(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg)
|
||||
{
|
||||
struct net_device *dev = dev_get_drvdata(&pdev->dev);
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
struct bfin_can_regs __iomem *reg = priv->membase;
|
||||
int timeout = BFIN_CAN_TIMEOUT;
|
||||
|
||||
if (netif_running(dev)) {
|
||||
/* enter sleep mode */
|
||||
bfin_write16(®->ctrl, bfin_read16(®->ctrl) | SMR);
|
||||
SSYNC();
|
||||
while (!(bfin_read16(®->intr) & SMACK)) {
|
||||
udelay(10);
|
||||
if (--timeout == 0) {
|
||||
dev_err(dev->dev.parent,
|
||||
"fail to enter sleep mode\n");
|
||||
BUG();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bfin_can_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev = dev_get_drvdata(&pdev->dev);
|
||||
struct bfin_can_priv *priv = netdev_priv(dev);
|
||||
struct bfin_can_regs __iomem *reg = priv->membase;
|
||||
|
||||
if (netif_running(dev)) {
|
||||
/* leave sleep mode */
|
||||
bfin_write16(®->intr, 0);
|
||||
SSYNC();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define bfin_can_suspend NULL
|
||||
#define bfin_can_resume NULL
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
static struct platform_driver bfin_can_driver = {
|
||||
.probe = bfin_can_probe,
|
||||
.remove = __devexit_p(bfin_can_remove),
|
||||
.suspend = bfin_can_suspend,
|
||||
.resume = bfin_can_resume,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init bfin_can_init(void)
|
||||
{
|
||||
return platform_driver_register(&bfin_can_driver);
|
||||
}
|
||||
module_init(bfin_can_init);
|
||||
|
||||
static void __exit bfin_can_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&bfin_can_driver);
|
||||
}
|
||||
module_exit(bfin_can_exit);
|
||||
|
||||
MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");
|
||||
Loading…
Reference in New Issue
Block a user