forked from Minki/linux
[MIPS] TXx9: Random cleanup
* Random cleanups spotted by checkpatch script. * Do not initialize panic_timeout. "panic=" kernel parameter can be used. * Do not add "ip=any" or "ip=bootp". This options is not board specific. * Do not add "root=/dev/nfs". This is default on CONFIG_ROOT_NFS. * Kill unused error checking. * Fix IRQ comment to match current code. * Kill some unneeded includes * ST0_ERL is already cleared in generic code. * conswitchp is initialized generic code. * __init is not needed in prototype. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Atsushi Nemoto
Ralf Baechle
parent
c49f91f51e
commit
bb72f1f729
@ -15,8 +15,6 @@
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#include <asm/io.h>
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#include <asm/txx9/smsc_fdc37m81x.h>
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#define DEBUG
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/* Common Registers */
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#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
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#define SMSC_FDC37M81X_CONFIG_DATA 0x01
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@ -55,7 +53,7 @@
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#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
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#define SMSC_FDC37M81X_CHIP_ID 0x4d
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static unsigned long g_smsc_fdc37m81x_base = 0;
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static unsigned long g_smsc_fdc37m81x_base;
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static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)
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{
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@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
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u8 chip_id;
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if (g_smsc_fdc37m81x_base)
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printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n",
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printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n",
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__func__,
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field, g_smsc_fdc37m81x_base);
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g_smsc_fdc37m81x_base = port;
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@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
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if (chip_id == SMSC_FDC37M81X_CHIP_ID)
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smsc_fdc37m81x_config_end();
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else {
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printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n",
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printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__,
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chip_id);
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g_smsc_fdc37m81x_base = 0;
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}
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@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
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}
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#ifdef DEBUG
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void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg)
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static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg)
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{
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printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg,
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printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n",
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key, dev, reg,
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smsc_fdc37m81x_rd(reg));
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}
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void smsc_fdc37m81x_config_dump(void)
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{
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u8 orig;
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char *fname = "smsc_fdc37m81x_config_dump()";
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const char *fname = __func__;
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smsc_fdc37m81x_config_beg();
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orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);
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printk("%s: common\n", fname);
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printk(KERN_INFO "%s: common\n", fname);
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smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
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SMSC_FDC37M81X_DNUM);
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smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
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@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void)
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smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
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SMSC_FDC37M81X_PMGT);
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printk("%s: keyboard\n", fname);
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printk(KERN_INFO "%s: keyboard\n", fname);
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smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);
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smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
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SMSC_FDC37M81X_ACTIVE);
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@ -30,15 +30,11 @@
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/jmr3927.h>
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@ -36,6 +36,7 @@
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/bootinfo.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/jmr3927.h>
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@ -56,20 +57,11 @@ prom_putchar(char c)
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return;
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}
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void
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puts(const char *cp)
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{
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while (*cp)
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prom_putchar(*cp++);
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prom_putchar('\r');
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prom_putchar('\n');
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}
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void __init jmr3927_prom_init(void)
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{
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/* CCFG */
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if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
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puts("Warning: TX3927 TLB off\n");
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printk(KERN_ERR "TX3927 TLB off\n");
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prom_init_cmdline();
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add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
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@ -74,9 +74,6 @@ static void __init jmr3927_mem_setup(void)
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_machine_restart = jmr3927_machine_restart;
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/* Reboot on panic */
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panic_timeout = 180;
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/* cache setup */
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{
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unsigned int conf;
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@ -94,7 +91,8 @@ static void __init jmr3927_mem_setup(void)
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#endif
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conf = read_c0_conf();
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conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
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conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE |
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TX39_CONF_WBON | TX39_CONF_CWFON);
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conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
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conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
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conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
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@ -107,19 +105,11 @@ static void __init jmr3927_mem_setup(void)
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/* initialize board */
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jmr3927_board_init();
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argptr = prom_getcmdline();
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if ((argptr = strstr(argptr, "ip=")) == NULL) {
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argptr = prom_getcmdline();
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strcat(argptr, " ip=bootp");
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}
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tx3927_setup_serial(1 << 1); /* ch1: noCTS */
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#ifdef CONFIG_SERIAL_TXX9_CONSOLE
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argptr = prom_getcmdline();
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if ((argptr = strstr(argptr, "console=")) == NULL) {
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argptr = prom_getcmdline();
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if (!strstr(argptr, "console="))
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strcat(argptr, " console=ttyS1,115200");
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}
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#endif
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}
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@ -199,16 +189,14 @@ static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
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#endif
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}
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static int __init jmr3927_rtc_init(void)
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static void __init jmr3927_rtc_init(void)
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{
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static struct resource __initdata res = {
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.start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
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.end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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};
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struct platform_device *dev;
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dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
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return IS_ERR(dev) ? PTR_ERR(dev) : 0;
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platform_device_register_simple("rtc-ds1742", -1, &res, 1);
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}
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static void __init jmr3927_device_init(void)
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@ -27,85 +27,86 @@
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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IRQ Device
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00 RBTX4927-ISA/00
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01 RBTX4927-ISA/01 PS2/Keyboard
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02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
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03 RBTX4927-ISA/03
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04 RBTX4927-ISA/04
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05 RBTX4927-ISA/05
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06 RBTX4927-ISA/06
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07 RBTX4927-ISA/07
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08 RBTX4927-ISA/08
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09 RBTX4927-ISA/09
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10 RBTX4927-ISA/10
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11 RBTX4927-ISA/11
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12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
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13 RBTX4927-ISA/13
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14 RBTX4927-ISA/14 IDE
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15 RBTX4927-ISA/15
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16 TX4927-CP0/00 Software 0
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17 TX4927-CP0/01 Software 1
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18 TX4927-CP0/02 Cascade TX4927-CP0
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19 TX4927-CP0/03 Multiplexed -- do not use
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20 TX4927-CP0/04 Multiplexed -- do not use
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21 TX4927-CP0/05 Multiplexed -- do not use
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22 TX4927-CP0/06 Multiplexed -- do not use
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23 TX4927-CP0/07 CPU TIMER
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24 TX4927-PIC/00
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25 TX4927-PIC/01
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26 TX4927-PIC/02
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27 TX4927-PIC/03 Cascade RBTX4927-IOC
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28 TX4927-PIC/04
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29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
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30 TX4927-PIC/06
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31 TX4927-PIC/07
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32 TX4927-PIC/08 TX4927 SerialIO Channel 0
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33 TX4927-PIC/09 TX4927 SerialIO Channel 1
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34 TX4927-PIC/10
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35 TX4927-PIC/11
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36 TX4927-PIC/12
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37 TX4927-PIC/13
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38 TX4927-PIC/14
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39 TX4927-PIC/15
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40 TX4927-PIC/16 TX4927 PCI PCI-C
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41 TX4927-PIC/17
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42 TX4927-PIC/18
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43 TX4927-PIC/19
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44 TX4927-PIC/20
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45 TX4927-PIC/21
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46 TX4927-PIC/22 TX4927 PCI PCI-ERR
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47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
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48 TX4927-PIC/24
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49 TX4927-PIC/25
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50 TX4927-PIC/26
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51 TX4927-PIC/27
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52 TX4927-PIC/28
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53 TX4927-PIC/29
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54 TX4927-PIC/30
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55 TX4927-PIC/31
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56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
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57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
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58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
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59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
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60 RBTX4927-IOC/04
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61 RBTX4927-IOC/05
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62 RBTX4927-IOC/06
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63 RBTX4927-IOC/07
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NOTES:
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SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
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SouthBridge/ISA/pin=0 no pci irq used by this device
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SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
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SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
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SouthBridge/PMC/pin=0 no pci irq used by this device
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SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
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SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
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JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
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*/
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* I8259A_IRQ_BASE+00
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* I8259A_IRQ_BASE+01 PS2/Keyboard
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* I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15)
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* I8259A_IRQ_BASE+03
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* I8259A_IRQ_BASE+04
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* I8259A_IRQ_BASE+05
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* I8259A_IRQ_BASE+06
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* I8259A_IRQ_BASE+07
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* I8259A_IRQ_BASE+08
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* I8259A_IRQ_BASE+09
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* I8259A_IRQ_BASE+10
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* I8259A_IRQ_BASE+11
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* I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time)
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* I8259A_IRQ_BASE+13
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* I8259A_IRQ_BASE+14 IDE
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* I8259A_IRQ_BASE+15
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*
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* MIPS_CPU_IRQ_BASE+00 Software 0
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* MIPS_CPU_IRQ_BASE+01 Software 1
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* MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0
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* MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
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* MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
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* MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
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* MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
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* MIPS_CPU_IRQ_BASE+07 CPU TIMER
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*
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* TXX9_IRQ_BASE+00
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* TXX9_IRQ_BASE+01
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* TXX9_IRQ_BASE+02
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* TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC
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* TXX9_IRQ_BASE+04
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* TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet
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* TXX9_IRQ_BASE+06
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* TXX9_IRQ_BASE+07
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* TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0
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* TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1
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* TXX9_IRQ_BASE+10
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* TXX9_IRQ_BASE+11
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* TXX9_IRQ_BASE+12
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* TXX9_IRQ_BASE+13
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* TXX9_IRQ_BASE+14
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* TXX9_IRQ_BASE+15
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* TXX9_IRQ_BASE+16 TX4927 PCI PCI-C
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* TXX9_IRQ_BASE+17
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* TXX9_IRQ_BASE+18
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* TXX9_IRQ_BASE+19
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* TXX9_IRQ_BASE+20
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* TXX9_IRQ_BASE+21
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* TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR
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* TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used)
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* TXX9_IRQ_BASE+24
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* TXX9_IRQ_BASE+25
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* TXX9_IRQ_BASE+26
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* TXX9_IRQ_BASE+27
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* TXX9_IRQ_BASE+28
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* TXX9_IRQ_BASE+29
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* TXX9_IRQ_BASE+30
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* TXX9_IRQ_BASE+31
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*
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* RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge)
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* RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge)
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* RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR)
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* RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4)
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* RBTX4927_IRQ_IOC+04
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* RBTX4927_IRQ_IOC+05
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* RBTX4927_IRQ_IOC+06
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* RBTX4927_IRQ_IOC+07
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*
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* NOTES:
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* SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
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* SouthBridge/ISA/pin=0 no pci irq used by this device
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* SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR
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* via ISA IRQ14
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* SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
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* SouthBridge/PMC/pin=0 no pci irq used by this device
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* SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
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* SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
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* JP7 is not bus master -- do NOT use -- only 4 pci bus master's
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* allowed -- SouthBridge, JP4, JP5, JP6
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*/
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#include <linux/init.h>
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#include <linux/types.h>
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@ -134,7 +135,7 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
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level3 = readb(rbtx4927_imstat_addr) & 0x1f;
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if (level3)
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sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
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return (sw_irq);
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return sw_irq;
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}
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static void __init toshiba_rbtx4927_irq_ioc_init(void)
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@ -46,7 +46,6 @@
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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@ -189,9 +188,6 @@ static void __init rbtx4927_mem_setup(void)
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u32 cp0_config;
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char *argptr;
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/* f/w leaves this on at startup */
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clear_c0_status(ST0_ERL);
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/* enable caches -- HCP5 does this, pmon does not */
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cp0_config = read_c0_config();
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cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
|
||||
@ -218,24 +214,9 @@ static void __init rbtx4927_mem_setup(void)
|
||||
|
||||
tx4927_setup_serial();
|
||||
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
|
||||
argptr = prom_getcmdline();
|
||||
if (strstr(argptr, "console=") == NULL) {
|
||||
strcat(argptr, " console=ttyS0,38400");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ROOT_NFS
|
||||
argptr = prom_getcmdline();
|
||||
if (strstr(argptr, "root=") == NULL) {
|
||||
strcat(argptr, " root=/dev/nfs rw");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IP_PNP
|
||||
argptr = prom_getcmdline();
|
||||
if (strstr(argptr, "ip=") == NULL) {
|
||||
strcat(argptr, " ip=any");
|
||||
}
|
||||
argptr = prom_getcmdline();
|
||||
if (!strstr(argptr, "console="))
|
||||
strcat(argptr, " console=ttyS0,38400");
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -298,19 +279,17 @@ static void __init rbtx4927_time_init(void)
|
||||
tx4927_time_init(0);
|
||||
}
|
||||
|
||||
static int __init toshiba_rbtx4927_rtc_init(void)
|
||||
static void __init toshiba_rbtx4927_rtc_init(void)
|
||||
{
|
||||
struct resource res = {
|
||||
.start = RBTX4927_BRAMRTC_BASE - IO_BASE,
|
||||
.end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
struct platform_device *dev =
|
||||
platform_device_register_simple("rtc-ds1742", -1, &res, 1);
|
||||
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
|
||||
platform_device_register_simple("rtc-ds1742", -1, &res, 1);
|
||||
}
|
||||
|
||||
static int __init rbtx4927_ne_init(void)
|
||||
static void __init rbtx4927_ne_init(void)
|
||||
{
|
||||
struct resource res[] = {
|
||||
{
|
||||
@ -322,10 +301,7 @@ static int __init rbtx4927_ne_init(void)
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
struct platform_device *dev =
|
||||
platform_device_register_simple("ne", -1,
|
||||
res, ARRAY_SIZE(res));
|
||||
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
|
||||
platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
|
||||
}
|
||||
|
||||
static void __init rbtx4927_device_init(void)
|
||||
|
||||
@ -11,59 +11,57 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
IRQ Device
|
||||
|
||||
16 TX4938-CP0/00 Software 0
|
||||
17 TX4938-CP0/01 Software 1
|
||||
18 TX4938-CP0/02 Cascade TX4938-CP0
|
||||
19 TX4938-CP0/03 Multiplexed -- do not use
|
||||
20 TX4938-CP0/04 Multiplexed -- do not use
|
||||
21 TX4938-CP0/05 Multiplexed -- do not use
|
||||
22 TX4938-CP0/06 Multiplexed -- do not use
|
||||
23 TX4938-CP0/07 CPU TIMER
|
||||
|
||||
24 TX4938-PIC/00
|
||||
25 TX4938-PIC/01
|
||||
26 TX4938-PIC/02 Cascade RBTX4938-IOC
|
||||
27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet
|
||||
28 TX4938-PIC/04
|
||||
29 TX4938-PIC/05 TX4938 ETH1
|
||||
30 TX4938-PIC/06 TX4938 ETH0
|
||||
31 TX4938-PIC/07
|
||||
32 TX4938-PIC/08 TX4938 SIO 0
|
||||
33 TX4938-PIC/09 TX4938 SIO 1
|
||||
34 TX4938-PIC/10 TX4938 DMA0
|
||||
35 TX4938-PIC/11 TX4938 DMA1
|
||||
36 TX4938-PIC/12 TX4938 DMA2
|
||||
37 TX4938-PIC/13 TX4938 DMA3
|
||||
38 TX4938-PIC/14
|
||||
39 TX4938-PIC/15
|
||||
40 TX4938-PIC/16 TX4938 PCIC
|
||||
41 TX4938-PIC/17 TX4938 TMR0
|
||||
42 TX4938-PIC/18 TX4938 TMR1
|
||||
43 TX4938-PIC/19 TX4938 TMR2
|
||||
44 TX4938-PIC/20
|
||||
45 TX4938-PIC/21
|
||||
46 TX4938-PIC/22 TX4938 PCIERR
|
||||
47 TX4938-PIC/23
|
||||
48 TX4938-PIC/24
|
||||
49 TX4938-PIC/25
|
||||
50 TX4938-PIC/26
|
||||
51 TX4938-PIC/27
|
||||
52 TX4938-PIC/28
|
||||
53 TX4938-PIC/29
|
||||
54 TX4938-PIC/30
|
||||
55 TX4938-PIC/31 TX4938 SPI
|
||||
|
||||
56 RBTX4938-IOC/00 PCI-D
|
||||
57 RBTX4938-IOC/01 PCI-C
|
||||
58 RBTX4938-IOC/02 PCI-B
|
||||
59 RBTX4938-IOC/03 PCI-A
|
||||
60 RBTX4938-IOC/04 RTC
|
||||
61 RBTX4938-IOC/05 ATA
|
||||
62 RBTX4938-IOC/06 MODEM
|
||||
63 RBTX4938-IOC/07 SWINT
|
||||
*/
|
||||
* MIPS_CPU_IRQ_BASE+00 Software 0
|
||||
* MIPS_CPU_IRQ_BASE+01 Software 1
|
||||
* MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0
|
||||
* MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
|
||||
* MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
|
||||
* MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
|
||||
* MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
|
||||
* MIPS_CPU_IRQ_BASE+07 CPU TIMER
|
||||
*
|
||||
* TXX9_IRQ_BASE+00
|
||||
* TXX9_IRQ_BASE+01
|
||||
* TXX9_IRQ_BASE+02 Cascade RBTX4938-IOC
|
||||
* TXX9_IRQ_BASE+03 RBTX4938 RTL-8019AS Ethernet
|
||||
* TXX9_IRQ_BASE+04
|
||||
* TXX9_IRQ_BASE+05 TX4938 ETH1
|
||||
* TXX9_IRQ_BASE+06 TX4938 ETH0
|
||||
* TXX9_IRQ_BASE+07
|
||||
* TXX9_IRQ_BASE+08 TX4938 SIO 0
|
||||
* TXX9_IRQ_BASE+09 TX4938 SIO 1
|
||||
* TXX9_IRQ_BASE+10 TX4938 DMA0
|
||||
* TXX9_IRQ_BASE+11 TX4938 DMA1
|
||||
* TXX9_IRQ_BASE+12 TX4938 DMA2
|
||||
* TXX9_IRQ_BASE+13 TX4938 DMA3
|
||||
* TXX9_IRQ_BASE+14
|
||||
* TXX9_IRQ_BASE+15
|
||||
* TXX9_IRQ_BASE+16 TX4938 PCIC
|
||||
* TXX9_IRQ_BASE+17 TX4938 TMR0
|
||||
* TXX9_IRQ_BASE+18 TX4938 TMR1
|
||||
* TXX9_IRQ_BASE+19 TX4938 TMR2
|
||||
* TXX9_IRQ_BASE+20
|
||||
* TXX9_IRQ_BASE+21
|
||||
* TXX9_IRQ_BASE+22 TX4938 PCIERR
|
||||
* TXX9_IRQ_BASE+23
|
||||
* TXX9_IRQ_BASE+24
|
||||
* TXX9_IRQ_BASE+25
|
||||
* TXX9_IRQ_BASE+26
|
||||
* TXX9_IRQ_BASE+27
|
||||
* TXX9_IRQ_BASE+28
|
||||
* TXX9_IRQ_BASE+29
|
||||
* TXX9_IRQ_BASE+30
|
||||
* TXX9_IRQ_BASE+31 TX4938 SPI
|
||||
*
|
||||
* RBTX4938_IRQ_IOC+00 PCI-D
|
||||
* RBTX4938_IRQ_IOC+01 PCI-C
|
||||
* RBTX4938_IRQ_IOC+02 PCI-B
|
||||
* RBTX4938_IRQ_IOC+03 PCI-A
|
||||
* RBTX4938_IRQ_IOC+04 RTC
|
||||
* RBTX4938_IRQ_IOC+05 ATA
|
||||
* RBTX4938_IRQ_IOC+06 MODEM
|
||||
* RBTX4938_IRQ_IOC+07 SWINT
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <asm/mipsregs.h>
|
||||
@ -93,9 +91,6 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
|
||||
return sw_irq;
|
||||
}
|
||||
|
||||
/**********************************************************************************/
|
||||
/* Functions for ioc */
|
||||
/**********************************************************************************/
|
||||
static void __init
|
||||
toshiba_rbtx4938_irq_ioc_init(void)
|
||||
{
|
||||
|
||||
@ -13,8 +13,6 @@
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
@ -169,45 +167,29 @@ static void __init rbtx4938_mem_setup(void)
|
||||
|
||||
tx4938_setup_serial();
|
||||
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
|
||||
argptr = prom_getcmdline();
|
||||
if (strstr(argptr, "console=") == NULL) {
|
||||
strcat(argptr, " console=ttyS0,38400");
|
||||
}
|
||||
argptr = prom_getcmdline();
|
||||
if (!strstr(argptr, "console="))
|
||||
strcat(argptr, " console=ttyS0,38400");
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
|
||||
printk("PIOSEL: disabling both ata and nand selection\n");
|
||||
local_irq_disable();
|
||||
printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n");
|
||||
txx9_clear64(&tx4938_ccfgptr->pcfg,
|
||||
TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
|
||||
printk("PIOSEL: enabling nand selection\n");
|
||||
printk(KERN_INFO "PIOSEL: enabling nand selection\n");
|
||||
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
|
||||
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
|
||||
printk("PIOSEL: enabling ata selection\n");
|
||||
printk(KERN_INFO "PIOSEL: enabling ata selection\n");
|
||||
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
|
||||
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IP_PNP
|
||||
argptr = prom_getcmdline();
|
||||
if (strstr(argptr, "ip=") == NULL) {
|
||||
strcat(argptr, " ip=any");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_FB
|
||||
{
|
||||
conswitchp = &dummy_con;
|
||||
}
|
||||
#endif
|
||||
|
||||
rbtx4938_spi_setup();
|
||||
pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
|
||||
/* fixup piosel */
|
||||
@ -228,7 +210,7 @@ static void __init rbtx4938_mem_setup(void)
|
||||
rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
|
||||
rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
|
||||
if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource))
|
||||
printk("request resource for fpga failed\n");
|
||||
printk(KERN_ERR "request resource for fpga failed\n");
|
||||
|
||||
_machine_restart = rbtx4938_machine_restart;
|
||||
|
||||
@ -238,7 +220,7 @@ static void __init rbtx4938_mem_setup(void)
|
||||
readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
|
||||
}
|
||||
|
||||
static int __init rbtx4938_ne_init(void)
|
||||
static void __init rbtx4938_ne_init(void)
|
||||
{
|
||||
struct resource res[] = {
|
||||
{
|
||||
@ -250,10 +232,7 @@ static int __init rbtx4938_ne_init(void)
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
struct platform_device *dev =
|
||||
platform_device_register_simple("ne", -1,
|
||||
res, ARRAY_SIZE(res));
|
||||
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
|
||||
platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
|
||||
}
|
||||
|
||||
static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
|
||||
|
||||
@ -56,7 +56,7 @@
|
||||
#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
|
||||
#define SMSC_FDC37M81X_CHIP_ID 0x4d
|
||||
|
||||
unsigned long __init smsc_fdc37m81x_init(unsigned long port);
|
||||
unsigned long smsc_fdc37m81x_init(unsigned long port);
|
||||
|
||||
void smsc_fdc37m81x_config_beg(void);
|
||||
|
||||
|
||||
@ -333,8 +333,8 @@ void tx3927_setup(void);
|
||||
void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr);
|
||||
void tx3927_setup_serial(unsigned int cts_mask);
|
||||
struct pci_controller;
|
||||
void __init tx3927_pcic_setup(struct pci_controller *channel,
|
||||
unsigned long sdram_size, int extarb);
|
||||
void tx3927_pcic_setup(struct pci_controller *channel,
|
||||
unsigned long sdram_size, int extarb);
|
||||
void tx3927_setup_pcierr_irq(void);
|
||||
void tx3927_irq_init(void);
|
||||
|
||||
|
||||
@ -193,8 +193,8 @@ struct tx4927_pcic_reg {
|
||||
|
||||
struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
|
||||
struct pci_controller *channel);
|
||||
void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
|
||||
struct pci_controller *channel, int extarb);
|
||||
void tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
|
||||
struct pci_controller *channel, int extarb);
|
||||
void tx4927_report_pcic_status(void);
|
||||
char *tx4927_pcibios_setup(char *str);
|
||||
void tx4927_dump_pcic_settings(void);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user