forked from Minki/linux
fpga: Add scatterlist based programming
Requiring contiguous kernel memory is not a good idea, this is a limited resource and allocation can fail under normal work loads. This introduces a .write_sg op that supporting drivers can provide to DMA directly from dis-contiguous memory and a new entry point fpga_mgr_buf_load_sg that users can call to directly provide page lists. The full matrix of compatibility is provided, either the linear or sg interface can be used by the user with a driver supporting either interface. A notable change for drivers is that the .write op can now be called multiple times. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Alan Tull <atull@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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b496df86ac
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baa6d39663
@ -22,7 +22,16 @@ To program the FPGA from a file or from a buffer:
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struct fpga_image_info *info,
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const char *buf, size_t count);
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Load the FPGA from an image which exists as a buffer in memory.
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Load the FPGA from an image which exists as a contiguous buffer in
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memory. Allocating contiguous kernel memory for the buffer should be avoided,
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users are encouraged to use the _sg interface instead of this.
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int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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struct sg_table *sgt);
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Load the FPGA from an image from non-contiguous in memory. Callers can
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construct a sg_table using alloc_page backed memory.
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int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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@ -166,7 +175,7 @@ success or negative error codes otherwise.
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The programming sequence is:
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1. .write_init
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2. .write (may be called once or multiple times)
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2. .write or .write_sg (may be called once or multiple times)
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3. .write_complete
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The .write_init function will prepare the FPGA to receive the image data. The
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@ -176,7 +185,11 @@ buffer up at least this much before starting.
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The .write function writes a buffer to the FPGA. The buffer may be contain the
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whole FPGA image or may be a smaller chunk of an FPGA image. In the latter
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case, this function is called multiple times for successive chunks.
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case, this function is called multiple times for successive chunks. This interface
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is suitable for drivers which use PIO.
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The .write_sg version behaves the same as .write except the input is a sg_table
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scatter list. This interface is suitable for drivers which use DMA.
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The .write_complete function is called after all the image has been written
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to put the FPGA into operating mode.
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@ -25,16 +25,106 @@
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#include <linux/of.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/scatterlist.h>
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#include <linux/highmem.h>
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static DEFINE_IDA(fpga_mgr_ida);
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static struct class *fpga_mgr_class;
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/*
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* Call the low level driver's write_init function. This will do the
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* device-specific things to get the FPGA into the state where it is ready to
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* receive an FPGA image. The low level driver only gets to see the first
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* initial_header_size bytes in the buffer.
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*/
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static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *buf, size_t count)
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{
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int ret;
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mgr->state = FPGA_MGR_STATE_WRITE_INIT;
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if (!mgr->mops->initial_header_size)
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ret = mgr->mops->write_init(mgr, info, NULL, 0);
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else
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ret = mgr->mops->write_init(
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mgr, info, buf, min(mgr->mops->initial_header_size, count));
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if (ret) {
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dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
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mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
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return ret;
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}
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return 0;
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}
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static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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struct sg_table *sgt)
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{
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struct sg_mapping_iter miter;
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size_t len;
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char *buf;
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int ret;
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if (!mgr->mops->initial_header_size)
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return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
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/*
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* First try to use miter to map the first fragment to access the
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* header, this is the typical path.
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*/
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sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
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if (sg_miter_next(&miter) &&
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miter.length >= mgr->mops->initial_header_size) {
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ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
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miter.length);
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sg_miter_stop(&miter);
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return ret;
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}
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sg_miter_stop(&miter);
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/* Otherwise copy the fragments into temporary memory. */
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buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
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mgr->mops->initial_header_size);
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ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
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kfree(buf);
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return ret;
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}
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/*
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* After all the FPGA image has been written, do the device specific steps to
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* finish and set the FPGA into operating mode.
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*/
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static int fpga_mgr_write_complete(struct fpga_manager *mgr,
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struct fpga_image_info *info)
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{
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int ret;
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
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ret = mgr->mops->write_complete(mgr, info);
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if (ret) {
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dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
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return ret;
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}
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mgr->state = FPGA_MGR_STATE_OPERATING;
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return 0;
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}
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/**
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* fpga_mgr_buf_load - load fpga from image in buffer
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* fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
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* @mgr: fpga manager
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* @info: fpga image specific information
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* @buf: buffer contain fpga image
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* @count: byte count of buf
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* @sgt: scatterlist table
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*
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* Step the low level fpga manager through the device-specific steps of getting
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* an FPGA ready to be configured, writing the image to it, then doing whatever
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@ -42,54 +132,139 @@ static struct class *fpga_mgr_class;
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* mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
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* not an error code.
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*
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* This is the preferred entry point for FPGA programming, it does not require
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* any contiguous kernel memory.
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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const char *buf, size_t count)
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int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
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struct sg_table *sgt)
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{
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struct device *dev = &mgr->dev;
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int ret;
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/*
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* Call the low level driver's write_init function. This will do the
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* device-specific things to get the FPGA into the state where it is
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* ready to receive an FPGA image. The low level driver only gets to
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* see the first initial_header_size bytes in the buffer.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE_INIT;
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ret = mgr->mops->write_init(mgr, info, buf,
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min(mgr->mops->initial_header_size, count));
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ret = fpga_mgr_write_init_sg(mgr, info, sgt);
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if (ret)
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return ret;
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/* Write the FPGA image to the FPGA. */
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mgr->state = FPGA_MGR_STATE_WRITE;
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if (mgr->mops->write_sg) {
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ret = mgr->mops->write_sg(mgr, sgt);
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} else {
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struct sg_mapping_iter miter;
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sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
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while (sg_miter_next(&miter)) {
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ret = mgr->mops->write(mgr, miter.addr, miter.length);
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if (ret)
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break;
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}
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sg_miter_stop(&miter);
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}
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if (ret) {
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dev_err(dev, "Error preparing FPGA for writing\n");
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mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
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dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_ERR;
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return ret;
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}
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return fpga_mgr_write_complete(mgr, info);
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_buf_load_sg);
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static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *buf, size_t count)
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{
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int ret;
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ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
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if (ret)
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return ret;
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/*
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* Write the FPGA image to the FPGA.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE;
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ret = mgr->mops->write(mgr, buf, count);
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if (ret) {
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dev_err(dev, "Error while writing image data to FPGA\n");
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dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_ERR;
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return ret;
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}
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/*
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* After all the FPGA image has been written, do the device specific
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* steps to finish and set the FPGA into operating mode.
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*/
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
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ret = mgr->mops->write_complete(mgr, info);
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if (ret) {
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dev_err(dev, "Error after writing image data to FPGA\n");
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mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
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return ret;
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}
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mgr->state = FPGA_MGR_STATE_OPERATING;
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return fpga_mgr_write_complete(mgr, info);
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}
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return 0;
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/**
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* fpga_mgr_buf_load - load fpga from image in buffer
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* @mgr: fpga manager
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* @flags: flags setting fpga confuration modes
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* @buf: buffer contain fpga image
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* @count: byte count of buf
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*
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* Step the low level fpga manager through the device-specific steps of getting
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* an FPGA ready to be configured, writing the image to it, then doing whatever
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* post-configuration steps necessary. This code assumes the caller got the
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* mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
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*
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* Return: 0 on success, negative error code otherwise.
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*/
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int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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const char *buf, size_t count)
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{
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struct page **pages;
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struct sg_table sgt;
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const void *p;
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int nr_pages;
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int index;
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int rc;
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/*
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* This is just a fast path if the caller has already created a
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* contiguous kernel buffer and the driver doesn't require SG, non-SG
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* drivers will still work on the slow path.
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*/
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if (mgr->mops->write)
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return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
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/*
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* Convert the linear kernel pointer into a sg_table of pages for use
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* by the driver.
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*/
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nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
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(unsigned long)buf / PAGE_SIZE;
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pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
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if (!pages)
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return -ENOMEM;
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p = buf - offset_in_page(buf);
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for (index = 0; index < nr_pages; index++) {
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if (is_vmalloc_addr(p))
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pages[index] = vmalloc_to_page(p);
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else
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pages[index] = kmap_to_page((void *)p);
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if (!pages[index]) {
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kfree(pages);
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return -EFAULT;
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}
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p += PAGE_SIZE;
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}
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/*
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* The temporary pages list is used to code share the merging algorithm
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* in sg_alloc_table_from_pages
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*/
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rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
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count, GFP_KERNEL);
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kfree(pages);
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if (rc)
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return rc;
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rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
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sg_free_table(&sgt);
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return rc;
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}
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EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
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@ -291,8 +466,9 @@ int fpga_mgr_register(struct device *dev, const char *name,
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struct fpga_manager *mgr;
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int id, ret;
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if (!mops || !mops->write_init || !mops->write ||
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!mops->write_complete || !mops->state) {
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if (!mops || !mops->write_complete || !mops->state ||
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!mops->write_init || (!mops->write && !mops->write_sg) ||
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(mops->write && mops->write_sg)) {
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dev_err(dev, "Attempt to register without fpga_manager_ops\n");
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return -EINVAL;
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}
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@ -22,6 +22,7 @@
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#define _LINUX_FPGA_MGR_H
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struct fpga_manager;
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struct sg_table;
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/**
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* enum fpga_mgr_states - fpga framework states
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@ -88,6 +89,7 @@ struct fpga_image_info {
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* @state: returns an enum value of the FPGA's state
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* @write_init: prepare the FPGA to receive confuration data
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* @write: write count bytes of configuration data to the FPGA
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* @write_sg: write the scatter list of configuration data to the FPGA
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* @write_complete: set FPGA to operating state after writing is done
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* @fpga_remove: optional: Set FPGA into a specific state during driver remove
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*
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@ -102,6 +104,7 @@ struct fpga_manager_ops {
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struct fpga_image_info *info,
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const char *buf, size_t count);
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int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
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int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
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int (*write_complete)(struct fpga_manager *mgr,
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struct fpga_image_info *info);
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void (*fpga_remove)(struct fpga_manager *mgr);
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@ -129,6 +132,8 @@ struct fpga_manager {
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int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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const char *buf, size_t count);
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int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
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struct sg_table *sgt);
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int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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Block a user