forked from Minki/linux
Merge branch 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits) x86: export vector_used_by_percpu_irq x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and() sched: nominate preferred wakeup cpu, fix x86: fix lguest used_vectors breakage, -v2 x86: fix warning in arch/x86/kernel/io_apic.c sched: fix warning in kernel/sched.c sched: move test_sd_parent() to an SMP section of sched.h sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0 sched: activate active load balancing in new idle cpus sched: bias task wakeups to preferred semi-idle packages sched: nominate preferred wakeup cpu sched: favour lower logical cpu number for sched_mc balance sched: framework for sched_mc/smt_power_savings=N sched: convert BALANCE_FOR_xx_POWER to inline functions x86: use possible_cpus=NUM to extend the possible cpus allowed x86: fix cpu_mask_to_apicid_and to include cpu_online_mask x86: update io_apic.c to the new cpumask code x86: Introduce topology_core_cpumask()/topology_thread_cpumask() x86: xen: use smp_call_function_many() x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c ... Fixed up trivial conflict in kernel/time/tick-sched.c manually
This commit is contained in:
commit
b840d79631
@ -50,16 +50,17 @@ additional_cpus=n (*) Use this to limit hotpluggable cpus. This option sets
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cpu_possible_map = cpu_present_map + additional_cpus
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(*) Option valid only for following architectures
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- x86_64, ia64
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- ia64
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ia64 and x86_64 use the number of disabled local apics in ACPI tables MADT
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to determine the number of potentially hot-pluggable cpus. The implementation
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should only rely on this to count the # of cpus, but *MUST* not rely on the
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apicid values in those tables for disabled apics. In the event BIOS doesn't
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mark such hot-pluggable cpus as disabled entries, one could use this
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parameter "additional_cpus=x" to represent those cpus in the cpu_possible_map.
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ia64 uses the number of disabled local apics in ACPI tables MADT to
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determine the number of potentially hot-pluggable cpus. The implementation
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should only rely on this to count the # of cpus, but *MUST* not rely
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on the apicid values in those tables for disabled apics. In the event
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BIOS doesn't mark such hot-pluggable cpus as disabled entries, one could
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use this parameter "additional_cpus=x" to represent those cpus in the
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cpu_possible_map.
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possible_cpus=n [s390 only] use this to set hotpluggable cpus.
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possible_cpus=n [s390,x86_64] use this to set hotpluggable cpus.
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This option sets possible_cpus bits in
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cpu_possible_map. Thus keeping the numbers of bits set
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constant even if the machine gets rebooted.
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@ -45,7 +45,6 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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extern int smp_num_cpus;
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#define cpu_possible_map cpu_present_map
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi(cpumask_t mask);
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@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq)
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last_cpu = cpu;
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irq_desc[irq].affinity = cpumask_of_cpu(cpu);
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irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
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irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
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return 0;
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}
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#endif /* CONFIG_SMP */
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@ -94,6 +94,7 @@ common_shutdown_1(void *generic_ptr)
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flags |= 0x00040000UL; /* "remain halted" */
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*pflags = flags;
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cpu_clear(cpuid, cpu_present_map);
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cpu_clear(cpuid, cpu_possible_map);
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halt();
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}
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#endif
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@ -120,6 +121,7 @@ common_shutdown_1(void *generic_ptr)
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#ifdef CONFIG_SMP
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/* Wait for the secondaries to halt. */
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cpu_clear(boot_cpuid, cpu_present_map);
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cpu_clear(boot_cpuid, cpu_possible_map);
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while (cpus_weight(cpu_present_map))
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barrier();
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#endif
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@ -70,11 +70,6 @@ enum ipi_message_type {
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/* Set to a secondary's cpuid when it comes online. */
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static int smp_secondary_alive __devinitdata = 0;
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/* Which cpus ids came online. */
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cpumask_t cpu_online_map;
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EXPORT_SYMBOL(cpu_online_map);
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int smp_num_probed; /* Internal processor count */
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int smp_num_cpus = 1; /* Number that came online. */
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EXPORT_SYMBOL(smp_num_cpus);
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@ -440,6 +435,7 @@ setup_smp(void)
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((char *)cpubase + i*hwrpb->processor_size);
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if ((cpu->flags & 0x1cc) == 0x1cc) {
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smp_num_probed++;
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cpu_set(i, cpu_possible_map);
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cpu_set(i, cpu_present_map);
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cpu->pal_revision = boot_cpu_palrev;
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}
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@ -473,6 +469,7 @@ smp_prepare_cpus(unsigned int max_cpus)
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/* Nothing to do on a UP box, or when told not to. */
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if (smp_num_probed == 1 || max_cpus == 0) {
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cpu_possible_map = cpumask_of_cpu(boot_cpuid);
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cpu_present_map = cpumask_of_cpu(boot_cpuid);
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printk(KERN_INFO "SMP mode deactivated.\n");
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return;
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@ -177,19 +177,19 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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static void
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dp264_set_affinity(unsigned int irq, cpumask_t affinity)
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dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq, affinity);
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cpu_set_irq_affinity(irq, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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}
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static void
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clipper_set_affinity(unsigned int irq, cpumask_t affinity)
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clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq - 16, affinity);
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cpu_set_irq_affinity(irq - 16, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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}
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@ -158,10 +158,10 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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static void
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titan_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&titan_irq_lock);
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titan_cpu_set_irq_affinity(irq - 16, affinity);
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titan_cpu_set_irq_affinity(irq - 16, *affinity);
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titan_update_irq_hw(titan_cached_irq_mask);
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spin_unlock(&titan_irq_lock);
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}
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@ -109,11 +109,11 @@ static void gic_unmask_irq(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
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static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
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{
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void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
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unsigned int shift = (irq % 4) * 8;
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unsigned int cpu = first_cpu(mask_val);
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unsigned int cpu = cpumask_first(mask_val);
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u32 val;
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spin_lock(&irq_controller_lock);
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@ -174,7 +174,7 @@ static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
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pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
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spin_lock_irq(&desc->lock);
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desc->chip->set_affinity(irq, cpumask_of_cpu(cpu));
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desc->chip->set_affinity(irq, cpumask_of(cpu));
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spin_unlock_irq(&desc->lock);
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}
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@ -33,16 +33,6 @@
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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/*
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* bitmask of present and online CPUs.
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* The present bitmask indicates that the CPU is physically present.
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* The online bitmask indicates that the CPU is up and running.
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*/
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cpumask_t cpu_possible_map;
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EXPORT_SYMBOL(cpu_possible_map);
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cpumask_t cpu_online_map;
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EXPORT_SYMBOL(cpu_online_map);
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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@ -178,7 +178,6 @@ static struct clock_event_device clkevt = {
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 150,
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.cpumask = CPU_MASK_CPU0,
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.set_next_event = clkevt32k_next_event,
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.set_mode = clkevt32k_mode,
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};
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@ -206,7 +205,7 @@ void __init at91rm9200_timer_init(void)
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clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
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clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
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clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
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clkevt.cpumask = cpumask_of_cpu(0);
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clkevt.cpumask = cpumask_of(0);
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clockevents_register_device(&clkevt);
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/* register clocksource */
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@ -91,7 +91,6 @@ static struct clock_event_device pit_clkevt = {
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.shift = 32,
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.rating = 100,
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.cpumask = CPU_MASK_CPU0,
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.set_mode = pit_clkevt_mode,
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};
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@ -173,6 +172,7 @@ static void __init at91sam926x_pit_init(void)
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/* Set up and register clockevents */
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pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
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pit_clkevt.cpumask = cpumask_of(0);
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clockevents_register_device(&pit_clkevt);
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}
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@ -322,7 +322,7 @@ static void __init davinci_timer_init(void)
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clockevent_davinci.min_delta_ns =
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clockevent_delta2ns(1, &clockevent_davinci);
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clockevent_davinci.cpumask = cpumask_of_cpu(0);
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clockevent_davinci.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_davinci);
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}
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@ -184,7 +184,7 @@ static int __init imx_clockevent_init(unsigned long rate)
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clockevent_imx.min_delta_ns =
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clockevent_delta2ns(0xf, &clockevent_imx);
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clockevent_imx.cpumask = cpumask_of_cpu(0);
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clockevent_imx.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_imx);
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@ -487,7 +487,7 @@ static int __init ixp4xx_clockevent_init(void)
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clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
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clockevent_ixp4xx.min_delta_ns =
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clockevent_delta2ns(0xf, &clockevent_ixp4xx);
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clockevent_ixp4xx.cpumask = cpumask_of_cpu(0);
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clockevent_ixp4xx.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_ixp4xx);
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return 0;
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@ -182,7 +182,7 @@ static void __init msm_timer_init(void)
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clockevent_delta2ns(0xf0000000 >> clock->shift, ce);
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/* 4 gets rounded down to 3 */
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ce->min_delta_ns = clockevent_delta2ns(4, ce);
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ce->cpumask = cpumask_of_cpu(0);
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ce->cpumask = cpumask_of(0);
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cs->mult = clocksource_hz2mult(clock->freq, cs->shift);
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res = clocksource_register(cs);
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@ -173,7 +173,7 @@ static void __init ns9360_timer_init(void)
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ns9360_clockevent_device.min_delta_ns =
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clockevent_delta2ns(1, &ns9360_clockevent_device);
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ns9360_clockevent_device.cpumask = cpumask_of_cpu(0);
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ns9360_clockevent_device.cpumask = cpumask_of(0);
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clockevents_register_device(&ns9360_clockevent_device);
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setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
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@ -173,7 +173,7 @@ static __init void omap_init_mpu_timer(unsigned long rate)
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clockevent_mpu_timer1.min_delta_ns =
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clockevent_delta2ns(1, &clockevent_mpu_timer1);
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clockevent_mpu_timer1.cpumask = cpumask_of_cpu(0);
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clockevent_mpu_timer1.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_mpu_timer1);
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}
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@ -187,7 +187,7 @@ static __init void omap_init_32k_timer(void)
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clockevent_32k_timer.min_delta_ns =
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clockevent_delta2ns(1, &clockevent_32k_timer);
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clockevent_32k_timer.cpumask = cpumask_of_cpu(0);
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clockevent_32k_timer.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_32k_timer);
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}
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@ -120,7 +120,7 @@ static void __init omap2_gp_clockevent_init(void)
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clockevent_gpt.min_delta_ns =
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clockevent_delta2ns(1, &clockevent_gpt);
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clockevent_gpt.cpumask = cpumask_of_cpu(0);
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clockevent_gpt.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_gpt);
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}
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|
@ -122,7 +122,6 @@ static struct clock_event_device ckevt_pxa_osmr0 = {
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 200,
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.cpumask = CPU_MASK_CPU0,
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.set_next_event = pxa_osmr0_set_next_event,
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.set_mode = pxa_osmr0_set_mode,
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};
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@ -163,6 +162,7 @@ static void __init pxa_timer_init(void)
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clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
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ckevt_pxa_osmr0.min_delta_ns =
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clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
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ckevt_pxa_osmr0.cpumask = cpumask_of(0);
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cksrc_pxa_oscr0.mult =
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clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
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|
@ -624,7 +624,7 @@ static struct clock_event_device timer0_clockevent = {
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.set_mode = timer_set_mode,
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.set_next_event = timer_set_next_event,
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.rating = 300,
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.cpumask = CPU_MASK_ALL,
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.cpumask = cpu_all_mask,
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};
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static void __init realview_clockevents_init(unsigned int timer_irq)
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|
@ -154,7 +154,7 @@ void __cpuinit local_timer_setup(void)
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clk->set_mode = local_timer_set_mode;
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clk->set_next_event = local_timer_set_next_event;
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clk->irq = IRQ_LOCALTIMER;
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clk->cpumask = cpumask_of_cpu(cpu);
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clk->cpumask = cpumask_of(cpu);
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clk->shift = 20;
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clk->mult = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift);
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clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
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@ -193,7 +193,7 @@ void __cpuinit local_timer_setup(void)
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clk->rating = 200;
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clk->set_mode = dummy_timer_set_mode;
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clk->broadcast = smp_timer_broadcast;
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clk->cpumask = cpumask_of_cpu(cpu);
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clk->cpumask = cpumask_of(cpu);
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|
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clockevents_register_device(clk);
|
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}
|
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|
@ -73,7 +73,6 @@ static struct clock_event_device ckevt_sa1100_osmr0 = {
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
|
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.rating = 200,
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.cpumask = CPU_MASK_CPU0,
|
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.set_next_event = sa1100_osmr0_set_next_event,
|
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.set_mode = sa1100_osmr0_set_mode,
|
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};
|
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@ -110,6 +109,7 @@ static void __init sa1100_timer_init(void)
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clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
|
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ckevt_sa1100_osmr0.min_delta_ns =
|
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clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
|
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ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
|
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|
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cksrc_sa1100_oscr.mult =
|
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clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
|
||||
|
@ -1005,7 +1005,7 @@ static void __init versatile_timer_init(void)
|
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timer0_clockevent.min_delta_ns =
|
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clockevent_delta2ns(0xf, &timer0_clockevent);
|
||||
|
||||
timer0_clockevent.cpumask = cpumask_of_cpu(0);
|
||||
timer0_clockevent.cpumask = cpumask_of(0);
|
||||
clockevents_register_device(&timer0_clockevent);
|
||||
}
|
||||
|
||||
|
@ -260,10 +260,10 @@ static void em_stop(void)
|
||||
static void em_route_irq(int irq, unsigned int cpu)
|
||||
{
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
cpumask_t mask = cpumask_of_cpu(cpu);
|
||||
const struct cpumask *mask = cpumask_of(cpu);
|
||||
|
||||
spin_lock_irq(&desc->lock);
|
||||
desc->affinity = mask;
|
||||
desc->affinity = *mask;
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
spin_unlock_irq(&desc->lock);
|
||||
}
|
||||
|
@ -190,7 +190,7 @@ static int __init mxc_clockevent_init(void)
|
||||
clockevent_mxc.min_delta_ns =
|
||||
clockevent_delta2ns(0xff, &clockevent_mxc);
|
||||
|
||||
clockevent_mxc.cpumask = cpumask_of_cpu(0);
|
||||
clockevent_mxc.cpumask = cpumask_of(0);
|
||||
|
||||
clockevents_register_device(&clockevent_mxc);
|
||||
|
||||
|
@ -149,7 +149,6 @@ static struct clock_event_device orion_clkevt = {
|
||||
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
|
||||
.shift = 32,
|
||||
.rating = 300,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_next_event = orion_clkevt_next_event,
|
||||
.set_mode = orion_clkevt_mode,
|
||||
};
|
||||
@ -199,5 +198,6 @@ void __init orion_time_init(unsigned int irq, unsigned int tclk)
|
||||
orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
|
||||
orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
|
||||
orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
|
||||
orion_clkevt.cpumask = cpumask_of(0);
|
||||
clockevents_register_device(&orion_clkevt);
|
||||
}
|
||||
|
@ -106,7 +106,6 @@ static struct clock_event_device comparator = {
|
||||
.features = CLOCK_EVT_FEAT_ONESHOT,
|
||||
.shift = 16,
|
||||
.rating = 50,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_next_event = comparator_next_event,
|
||||
.set_mode = comparator_mode,
|
||||
};
|
||||
@ -134,6 +133,7 @@ void __init time_init(void)
|
||||
comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
|
||||
comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
|
||||
comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
|
||||
comparator.cpumask = cpumask_of(0);
|
||||
|
||||
sysreg_write(COMPARE, 0);
|
||||
timer_irqaction.dev_id = &comparator;
|
||||
|
@ -162,7 +162,6 @@ static struct clock_event_device clockevent_bfin = {
|
||||
.name = "bfin_core_timer",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.shift = 32,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_next_event = bfin_timer_set_next_event,
|
||||
.set_mode = bfin_timer_set_mode,
|
||||
};
|
||||
@ -193,6 +192,7 @@ static int __init bfin_clockevent_init(void)
|
||||
clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
|
||||
clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
|
||||
clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
|
||||
clockevent_bfin.cpumask = cpumask_of(0);
|
||||
clockevents_register_device(&clockevent_bfin);
|
||||
|
||||
return 0;
|
||||
|
@ -325,11 +325,11 @@ static void end_crisv32_irq(unsigned int irq)
|
||||
{
|
||||
}
|
||||
|
||||
void set_affinity_crisv32_irq(unsigned int irq, cpumask_t dest)
|
||||
void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
|
||||
{
|
||||
unsigned long flags;
|
||||
spin_lock_irqsave(&irq_lock, flags);
|
||||
irq_allocations[irq - FIRST_IRQ].mask = dest;
|
||||
irq_allocations[irq - FIRST_IRQ].mask = *dest;
|
||||
spin_unlock_irqrestore(&irq_lock, flags);
|
||||
}
|
||||
|
||||
|
@ -29,11 +29,7 @@
|
||||
spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
|
||||
|
||||
/* CPU masks */
|
||||
cpumask_t cpu_online_map = CPU_MASK_NONE;
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
|
||||
cpumask_t cpu_possible_map;
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
EXPORT_SYMBOL(phys_cpu_present_map);
|
||||
|
||||
/* Variables used during SMP boot */
|
||||
|
@ -4,7 +4,6 @@
|
||||
#include <linux/cpumask.h>
|
||||
|
||||
extern cpumask_t phys_cpu_present_map;
|
||||
extern cpumask_t cpu_possible_map;
|
||||
|
||||
#define raw_smp_processor_id() (current_thread_info()->cpu)
|
||||
|
||||
|
@ -22,7 +22,7 @@ hpsim_irq_noop (unsigned int irq)
|
||||
}
|
||||
|
||||
static void
|
||||
hpsim_set_affinity_noop (unsigned int a, cpumask_t b)
|
||||
hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -57,7 +57,6 @@ extern struct smp_boot_data {
|
||||
|
||||
extern char no_int_routing __devinitdata;
|
||||
|
||||
extern cpumask_t cpu_online_map;
|
||||
extern cpumask_t cpu_core_map[NR_CPUS];
|
||||
DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
|
||||
extern int smp_num_siblings;
|
||||
|
@ -55,7 +55,6 @@
|
||||
void build_cpu_to_node_map(void);
|
||||
|
||||
#define SD_CPU_INIT (struct sched_domain) { \
|
||||
.span = CPU_MASK_NONE, \
|
||||
.parent = NULL, \
|
||||
.child = NULL, \
|
||||
.groups = NULL, \
|
||||
@ -80,7 +79,6 @@ void build_cpu_to_node_map(void);
|
||||
|
||||
/* sched_domains SD_NODE_INIT for IA64 NUMA machines */
|
||||
#define SD_NODE_INIT (struct sched_domain) { \
|
||||
.span = CPU_MASK_NONE, \
|
||||
.parent = NULL, \
|
||||
.child = NULL, \
|
||||
.groups = NULL, \
|
||||
|
@ -330,25 +330,25 @@ unmask_irq (unsigned int irq)
|
||||
|
||||
|
||||
static void
|
||||
iosapic_set_affinity (unsigned int irq, cpumask_t mask)
|
||||
iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
#ifdef CONFIG_SMP
|
||||
u32 high32, low32;
|
||||
int dest, rte_index;
|
||||
int cpu, dest, rte_index;
|
||||
int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
|
||||
struct iosapic_rte_info *rte;
|
||||
struct iosapic *iosapic;
|
||||
|
||||
irq &= (~IA64_IRQ_REDIRECTED);
|
||||
|
||||
cpus_and(mask, mask, cpu_online_map);
|
||||
if (cpus_empty(mask))
|
||||
cpu = cpumask_first_and(cpu_online_mask, mask);
|
||||
if (cpu >= nr_cpu_ids)
|
||||
return;
|
||||
|
||||
if (irq_prepare_move(irq, first_cpu(mask)))
|
||||
if (irq_prepare_move(irq, cpu))
|
||||
return;
|
||||
|
||||
dest = cpu_physical_id(first_cpu(mask));
|
||||
dest = cpu_physical_id(cpu);
|
||||
|
||||
if (!iosapic_intr_info[irq].count)
|
||||
return; /* not an IOSAPIC interrupt */
|
||||
|
@ -133,7 +133,6 @@ unsigned int vectors_in_migration[NR_IRQS];
|
||||
*/
|
||||
static void migrate_irqs(void)
|
||||
{
|
||||
cpumask_t mask;
|
||||
irq_desc_t *desc;
|
||||
int irq, new_cpu;
|
||||
|
||||
@ -152,15 +151,14 @@ static void migrate_irqs(void)
|
||||
if (desc->status == IRQ_PER_CPU)
|
||||
continue;
|
||||
|
||||
cpus_and(mask, irq_desc[irq].affinity, cpu_online_map);
|
||||
if (any_online_cpu(mask) == NR_CPUS) {
|
||||
if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask)
|
||||
>= nr_cpu_ids) {
|
||||
/*
|
||||
* Save it for phase 2 processing
|
||||
*/
|
||||
vectors_in_migration[irq] = irq;
|
||||
|
||||
new_cpu = any_online_cpu(cpu_online_map);
|
||||
mask = cpumask_of_cpu(new_cpu);
|
||||
|
||||
/*
|
||||
* Al three are essential, currently WARN_ON.. maybe panic?
|
||||
@ -168,7 +166,8 @@ static void migrate_irqs(void)
|
||||
if (desc->chip && desc->chip->disable &&
|
||||
desc->chip->enable && desc->chip->set_affinity) {
|
||||
desc->chip->disable(irq);
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
desc->chip->set_affinity(irq,
|
||||
cpumask_of(new_cpu));
|
||||
desc->chip->enable(irq);
|
||||
} else {
|
||||
WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
|
||||
|
@ -49,11 +49,12 @@
|
||||
static struct irq_chip ia64_msi_chip;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
|
||||
static void ia64_set_msi_irq_affinity(unsigned int irq,
|
||||
const cpumask_t *cpu_mask)
|
||||
{
|
||||
struct msi_msg msg;
|
||||
u32 addr, data;
|
||||
int cpu = first_cpu(cpu_mask);
|
||||
int cpu = first_cpu(*cpu_mask);
|
||||
|
||||
if (!cpu_online(cpu))
|
||||
return;
|
||||
@ -166,12 +167,11 @@ void arch_teardown_msi_irq(unsigned int irq)
|
||||
|
||||
#ifdef CONFIG_DMAR
|
||||
#ifdef CONFIG_SMP
|
||||
static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg = irq_cfg + irq;
|
||||
struct msi_msg msg;
|
||||
int cpu = first_cpu(mask);
|
||||
|
||||
int cpu = cpumask_first(mask);
|
||||
|
||||
if (!cpu_online(cpu))
|
||||
return;
|
||||
@ -187,7 +187,7 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
|
||||
|
||||
dmar_msi_write(irq, &msg);
|
||||
irq_desc[irq].affinity = mask;
|
||||
irq_desc[irq].affinity = *mask;
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
@ -131,12 +131,6 @@ struct task_struct *task_for_booting_cpu;
|
||||
*/
|
||||
DEFINE_PER_CPU(int, cpu_state);
|
||||
|
||||
/* Bitmasks of currently online, and possible CPUs */
|
||||
cpumask_t cpu_online_map;
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
cpumask_t cpu_possible_map = CPU_MASK_NONE;
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
|
||||
EXPORT_SYMBOL(cpu_core_map);
|
||||
DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
|
||||
@ -688,7 +682,7 @@ int migrate_platform_irqs(unsigned int cpu)
|
||||
{
|
||||
int new_cpei_cpu;
|
||||
irq_desc_t *desc = NULL;
|
||||
cpumask_t mask;
|
||||
const struct cpumask *mask;
|
||||
int retval = 0;
|
||||
|
||||
/*
|
||||
@ -701,7 +695,7 @@ int migrate_platform_irqs(unsigned int cpu)
|
||||
* Now re-target the CPEI to a different processor
|
||||
*/
|
||||
new_cpei_cpu = any_online_cpu(cpu_online_map);
|
||||
mask = cpumask_of_cpu(new_cpei_cpu);
|
||||
mask = cpumask_of(new_cpei_cpu);
|
||||
set_cpei_target_cpu(new_cpei_cpu);
|
||||
desc = irq_desc + ia64_cpe_irq;
|
||||
/*
|
||||
|
@ -219,7 +219,7 @@ static ssize_t show_shared_cpu_map(struct cache_info *this_leaf, char *buf)
|
||||
cpumask_t shared_cpu_map;
|
||||
|
||||
cpus_and(shared_cpu_map, this_leaf->shared_cpu_map, cpu_online_map);
|
||||
len = cpumask_scnprintf(buf, NR_CPUS+1, shared_cpu_map);
|
||||
len = cpumask_scnprintf(buf, NR_CPUS+1, &shared_cpu_map);
|
||||
len += sprintf(buf+len, "\n");
|
||||
return len;
|
||||
}
|
||||
|
@ -227,14 +227,14 @@ finish_up:
|
||||
return new_irq_info;
|
||||
}
|
||||
|
||||
static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
|
||||
static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
|
||||
nasid_t nasid;
|
||||
int slice;
|
||||
|
||||
nasid = cpuid_to_nasid(first_cpu(mask));
|
||||
slice = cpuid_to_slice(first_cpu(mask));
|
||||
nasid = cpuid_to_nasid(cpumask_first(mask));
|
||||
slice = cpuid_to_slice(cpumask_first(mask));
|
||||
|
||||
list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
|
||||
sn_irq_lh[irq], list)
|
||||
|
@ -151,7 +151,8 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
|
||||
static void sn_set_msi_irq_affinity(unsigned int irq,
|
||||
const struct cpumask *cpu_mask)
|
||||
{
|
||||
struct msi_msg msg;
|
||||
int slice;
|
||||
@ -164,7 +165,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
|
||||
struct sn_pcibus_provider *provider;
|
||||
unsigned int cpu;
|
||||
|
||||
cpu = first_cpu(cpu_mask);
|
||||
cpu = cpumask_first(cpu_mask);
|
||||
sn_irq_info = sn_msi_info[irq].sn_irq_info;
|
||||
if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
|
||||
return;
|
||||
@ -204,7 +205,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
|
||||
msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
|
||||
|
||||
write_msi_msg(irq, &msg);
|
||||
irq_desc[irq].affinity = cpu_mask;
|
||||
irq_desc[irq].affinity = *cpu_mask;
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
@ -10,6 +10,7 @@ config M32R
|
||||
default y
|
||||
select HAVE_IDE
|
||||
select HAVE_OPROFILE
|
||||
select INIT_ALL_POSSIBLE
|
||||
|
||||
config SBUS
|
||||
bool
|
||||
|
@ -73,17 +73,11 @@ static unsigned int bsp_phys_id = -1;
|
||||
/* Bitmask of physically existing CPUs */
|
||||
physid_mask_t phys_cpu_present_map;
|
||||
|
||||
/* Bitmask of currently online CPUs */
|
||||
cpumask_t cpu_online_map;
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
|
||||
cpumask_t cpu_bootout_map;
|
||||
cpumask_t cpu_bootin_map;
|
||||
static cpumask_t cpu_callin_map;
|
||||
cpumask_t cpu_callout_map;
|
||||
EXPORT_SYMBOL(cpu_callout_map);
|
||||
cpumask_t cpu_possible_map = CPU_MASK_ALL;
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
/* Per CPU bogomips and other parameters */
|
||||
struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
|
||||
|
@ -156,7 +156,7 @@ void hw_timer_init(void)
|
||||
{
|
||||
u32 imr;
|
||||
|
||||
cf_pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
|
||||
cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
|
||||
cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
|
||||
cf_pit_clockevent.max_delta_ns =
|
||||
clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
|
||||
|
@ -49,7 +49,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
|
||||
#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
|
||||
#include <linux/cpumask.h>
|
||||
|
||||
extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity);
|
||||
extern void plat_set_irq_affinity(unsigned int irq,
|
||||
const struct cpumask *affinity);
|
||||
extern void smtc_forward_irq(unsigned int irq);
|
||||
|
||||
/*
|
||||
|
@ -37,7 +37,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
|
||||
|
||||
/* sched_domains SD_NODE_INIT for SGI IP27 machines */
|
||||
#define SD_NODE_INIT (struct sched_domain) { \
|
||||
.span = CPU_MASK_NONE, \
|
||||
.parent = NULL, \
|
||||
.child = NULL, \
|
||||
.groups = NULL, \
|
||||
|
@ -38,9 +38,6 @@ extern int __cpu_logical_map[NR_CPUS];
|
||||
#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
|
||||
#define SMP_CALL_FUNCTION 0x2
|
||||
|
||||
extern cpumask_t phys_cpu_present_map;
|
||||
#define cpu_possible_map phys_cpu_present_map
|
||||
|
||||
extern void asmlinkage smp_bootstrap(void);
|
||||
|
||||
/*
|
||||
|
@ -146,7 +146,7 @@ void __init plat_time_init(void)
|
||||
|
||||
BUG_ON(HZ != 100);
|
||||
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
clockevents_register_device(cd);
|
||||
action->dev_id = cd;
|
||||
setup_irq(JAZZ_TIMER_IRQ, action);
|
||||
|
@ -126,7 +126,7 @@ void __cpuinit sb1480_clockevent_init(void)
|
||||
cd->min_delta_ns = clockevent_delta2ns(2, cd);
|
||||
cd->rating = 200;
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = sibyte_next_event;
|
||||
cd->set_mode = sibyte_set_mode;
|
||||
clockevents_register_device(cd);
|
||||
@ -148,6 +148,6 @@ void __cpuinit sb1480_clockevent_init(void)
|
||||
action->name = name;
|
||||
action->dev_id = cd;
|
||||
|
||||
irq_set_affinity(irq, cpumask_of_cpu(cpu));
|
||||
irq_set_affinity(irq, cpumask_of(cpu));
|
||||
setup_irq(irq, action);
|
||||
}
|
||||
|
@ -88,7 +88,6 @@ static void ds1287_event_handler(struct clock_event_device *dev)
|
||||
static struct clock_event_device ds1287_clockevent = {
|
||||
.name = "ds1287",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_next_event = ds1287_set_next_event,
|
||||
.set_mode = ds1287_set_mode,
|
||||
.event_handler = ds1287_event_handler,
|
||||
@ -122,6 +121,7 @@ int __init ds1287_clockevent_init(int irq)
|
||||
clockevent_set_clock(cd, 32768);
|
||||
cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
|
||||
cd->cpumask = cpumask_of(0);
|
||||
|
||||
clockevents_register_device(&ds1287_clockevent);
|
||||
|
||||
|
@ -96,7 +96,6 @@ static void gt641xx_timer0_event_handler(struct clock_event_device *dev)
|
||||
static struct clock_event_device gt641xx_timer0_clockevent = {
|
||||
.name = "gt641xx-timer0",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.irq = GT641XX_TIMER0_IRQ,
|
||||
.set_next_event = gt641xx_timer0_set_next_event,
|
||||
.set_mode = gt641xx_timer0_set_mode,
|
||||
@ -132,6 +131,7 @@ static int __init gt641xx_timer0_clockevent_init(void)
|
||||
clockevent_set_clock(cd, gt641xx_base_clock);
|
||||
cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
|
||||
cd->cpumask = cpumask_of(0);
|
||||
|
||||
clockevents_register_device(>641xx_timer0_clockevent);
|
||||
|
||||
|
@ -195,7 +195,7 @@ int __cpuinit mips_clockevent_init(void)
|
||||
|
||||
cd->rating = 300;
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = mips_next_event;
|
||||
cd->set_mode = mips_set_clock_mode;
|
||||
cd->event_handler = mips_event_handler;
|
||||
|
@ -125,7 +125,7 @@ void __cpuinit sb1250_clockevent_init(void)
|
||||
cd->min_delta_ns = clockevent_delta2ns(2, cd);
|
||||
cd->rating = 200;
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = sibyte_next_event;
|
||||
cd->set_mode = sibyte_set_mode;
|
||||
clockevents_register_device(cd);
|
||||
@ -147,6 +147,6 @@ void __cpuinit sb1250_clockevent_init(void)
|
||||
action->name = name;
|
||||
action->dev_id = cd;
|
||||
|
||||
irq_set_affinity(irq, cpumask_of_cpu(cpu));
|
||||
irq_set_affinity(irq, cpumask_of(cpu));
|
||||
setup_irq(irq, action);
|
||||
}
|
||||
|
@ -292,7 +292,7 @@ int __cpuinit mips_clockevent_init(void)
|
||||
|
||||
cd->rating = 300;
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = mips_next_event;
|
||||
cd->set_mode = mips_set_clock_mode;
|
||||
cd->event_handler = mips_event_handler;
|
||||
|
@ -112,7 +112,6 @@ static struct clock_event_device txx9tmr_clock_event_device = {
|
||||
.name = "TXx9",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.rating = 200,
|
||||
.cpumask = CPU_MASK_CPU0,
|
||||
.set_mode = txx9tmr_set_mode,
|
||||
.set_next_event = txx9tmr_set_next_event,
|
||||
};
|
||||
@ -150,6 +149,7 @@ void __init txx9_clockevent_init(unsigned long baseaddr, int irq,
|
||||
clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(0xf, cd);
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of(0),
|
||||
clockevents_register_device(cd);
|
||||
setup_irq(irq, &txx9tmr_irq);
|
||||
printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
|
||||
|
@ -115,7 +115,7 @@ void __init setup_pit_timer(void)
|
||||
* Start pit with the boot cpu mask and make it global after the
|
||||
* IO_APIC has been initialized.
|
||||
*/
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
clockevent_set_clock(cd, CLOCK_TICK_RATE);
|
||||
cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
|
||||
|
@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq)
|
||||
|
||||
static DEFINE_SPINLOCK(gic_lock);
|
||||
|
||||
static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
{
|
||||
cpumask_t tmp = CPU_MASK_NONE;
|
||||
unsigned long flags;
|
||||
@ -164,7 +164,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
pr_debug(KERN_DEBUG "%s called\n", __func__);
|
||||
irq -= _irqbase;
|
||||
|
||||
cpus_and(tmp, cpumask, cpu_online_map);
|
||||
cpumask_and(&tmp, cpumask, cpu_online_mask);
|
||||
if (cpus_empty(tmp))
|
||||
return;
|
||||
|
||||
@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
|
||||
|
||||
}
|
||||
irq_desc[irq].affinity = cpumask;
|
||||
irq_desc[irq].affinity = *cpumask;
|
||||
spin_unlock_irqrestore(&gic_lock, flags);
|
||||
|
||||
}
|
||||
|
@ -51,10 +51,10 @@ static int __init allowcpus(char *str)
|
||||
int len;
|
||||
|
||||
cpus_clear(cpu_allow_map);
|
||||
if (cpulist_parse(str, cpu_allow_map) == 0) {
|
||||
if (cpulist_parse(str, &cpu_allow_map) == 0) {
|
||||
cpu_set(0, cpu_allow_map);
|
||||
cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
|
||||
len = cpulist_scnprintf(buf, sizeof(buf)-1, cpu_possible_map);
|
||||
len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
|
||||
buf[len] = '\0';
|
||||
pr_debug("Allowable CPUs: %s\n", buf);
|
||||
return 1;
|
||||
@ -226,7 +226,7 @@ void __init cmp_smp_setup(void)
|
||||
|
||||
for (i = 1; i < NR_CPUS; i++) {
|
||||
if (amon_cpu_avail(i)) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
cpu_set(i, cpu_possible_map);
|
||||
__cpu_number_map[i] = ++ncpu;
|
||||
__cpu_logical_map[ncpu] = i;
|
||||
}
|
||||
|
@ -70,7 +70,7 @@ static unsigned int __init smvp_vpe_init(unsigned int tc, unsigned int mvpconf0,
|
||||
write_vpe_c0_vpeconf0(tmp);
|
||||
|
||||
/* Record this as available CPU */
|
||||
cpu_set(tc, phys_cpu_present_map);
|
||||
cpu_set(tc, cpu_possible_map);
|
||||
__cpu_number_map[tc] = ++ncpu;
|
||||
__cpu_logical_map[ncpu] = tc;
|
||||
}
|
||||
|
@ -44,15 +44,10 @@
|
||||
#include <asm/mipsmtregs.h>
|
||||
#endif /* CONFIG_MIPS_MT_SMTC */
|
||||
|
||||
cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
|
||||
volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
|
||||
cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
|
||||
int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
|
||||
int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
|
||||
|
||||
EXPORT_SYMBOL(phys_cpu_present_map);
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
|
||||
extern void cpu_idle(void);
|
||||
|
||||
/* Number of TCs (or siblings in Intel speak) per CPU core */
|
||||
@ -195,7 +190,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
|
||||
/* preload SMP state for boot cpu */
|
||||
void __devinit smp_prepare_boot_cpu(void)
|
||||
{
|
||||
cpu_set(0, phys_cpu_present_map);
|
||||
cpu_set(0, cpu_possible_map);
|
||||
cpu_set(0, cpu_online_map);
|
||||
cpu_set(0, cpu_callin_map);
|
||||
}
|
||||
|
@ -290,7 +290,7 @@ static void smtc_configure_tlb(void)
|
||||
* possibly leave some TCs/VPEs as "slave" processors.
|
||||
*
|
||||
* Use c0_MVPConf0 to find out how many TCs are available, setting up
|
||||
* phys_cpu_present_map and the logical/physical mappings.
|
||||
* cpu_possible_map and the logical/physical mappings.
|
||||
*/
|
||||
|
||||
int __init smtc_build_cpu_map(int start_cpu_slot)
|
||||
@ -304,7 +304,7 @@ int __init smtc_build_cpu_map(int start_cpu_slot)
|
||||
*/
|
||||
ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
|
||||
for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
cpu_set(i, cpu_possible_map);
|
||||
__cpu_number_map[i] = i;
|
||||
__cpu_logical_map[i] = i;
|
||||
}
|
||||
@ -521,7 +521,7 @@ void smtc_prepare_cpus(int cpus)
|
||||
* Pull any physically present but unused TCs out of circulation.
|
||||
*/
|
||||
while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) {
|
||||
cpu_clear(tc, phys_cpu_present_map);
|
||||
cpu_clear(tc, cpu_possible_map);
|
||||
cpu_clear(tc, cpu_present_map);
|
||||
tc++;
|
||||
}
|
||||
|
@ -114,9 +114,9 @@ struct plat_smp_ops msmtc_smp_ops = {
|
||||
*/
|
||||
|
||||
|
||||
void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
|
||||
void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
|
||||
{
|
||||
cpumask_t tmask = affinity;
|
||||
cpumask_t tmask = *affinity;
|
||||
int cpu = 0;
|
||||
void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
|
||||
|
||||
@ -139,7 +139,7 @@ void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
|
||||
* be made to forward to an offline "CPU".
|
||||
*/
|
||||
|
||||
for_each_cpu_mask(cpu, affinity) {
|
||||
for_each_cpu(cpu, affinity) {
|
||||
if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
|
||||
cpu_clear(cpu, tmask);
|
||||
}
|
||||
|
@ -102,6 +102,7 @@ __init void plat_time_init(void)
|
||||
unsigned int p;
|
||||
unsigned int pow2p;
|
||||
|
||||
pnx8xxx_clockevent.cpumask = cpu_none_mask;
|
||||
clockevents_register_device(&pnx8xxx_clockevent);
|
||||
clocksource_register(&pnx_clocksource);
|
||||
|
||||
|
@ -141,7 +141,7 @@ static void __cpuinit yos_boot_secondary(int cpu, struct task_struct *idle)
|
||||
}
|
||||
|
||||
/*
|
||||
* Detect available CPUs, populate phys_cpu_present_map before smp_init
|
||||
* Detect available CPUs, populate cpu_possible_map before smp_init
|
||||
*
|
||||
* We don't want to start the secondary CPU yet nor do we have a nice probing
|
||||
* feature in PMON so we just assume presence of the secondary core.
|
||||
@ -150,10 +150,10 @@ static void __init yos_smp_setup(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
cpus_clear(phys_cpu_present_map);
|
||||
cpus_clear(cpu_possible_map);
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
cpu_set(i, cpu_possible_map);
|
||||
__cpu_number_map[i] = i;
|
||||
__cpu_logical_map[i] = i;
|
||||
}
|
||||
|
@ -76,7 +76,7 @@ static int do_cpumask(cnodeid_t cnode, nasid_t nasid, int highest)
|
||||
/* Only let it join in if it's marked enabled */
|
||||
if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
|
||||
(tot_cpus_found != NR_CPUS)) {
|
||||
cpu_set(cpuid, phys_cpu_present_map);
|
||||
cpu_set(cpuid, cpu_possible_map);
|
||||
alloc_cpupda(cpuid, tot_cpus_found);
|
||||
cpus_found++;
|
||||
tot_cpus_found++;
|
||||
|
@ -134,7 +134,7 @@ void __cpuinit hub_rt_clock_event_init(void)
|
||||
cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
|
||||
cd->rating = 200;
|
||||
cd->irq = irq;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = rt_next_event;
|
||||
cd->set_mode = rt_set_mode;
|
||||
clockevents_register_device(cd);
|
||||
|
@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq);
|
||||
static void disable_bcm1480_irq(unsigned int irq);
|
||||
static void ack_bcm1480_irq(unsigned int irq);
|
||||
#ifdef CONFIG_SMP
|
||||
static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask);
|
||||
static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
int i = 0, old_cpu, cpu, int_on, k;
|
||||
u64 cur_ints;
|
||||
@ -117,11 +117,11 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
unsigned long flags;
|
||||
unsigned int irq_dirty;
|
||||
|
||||
if (cpus_weight(mask) != 1) {
|
||||
if (cpumask_weight(mask) != 1) {
|
||||
printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
|
||||
return;
|
||||
}
|
||||
i = first_cpu(mask);
|
||||
i = cpumask_first(mask);
|
||||
|
||||
/* Convert logical CPU to physical CPU */
|
||||
cpu = cpu_logical_map(i);
|
||||
|
@ -136,7 +136,7 @@ static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
|
||||
|
||||
/*
|
||||
* Use CFE to find out how many CPUs are available, setting up
|
||||
* phys_cpu_present_map and the logical/physical mappings.
|
||||
* cpu_possible_map and the logical/physical mappings.
|
||||
* XXXKW will the boot CPU ever not be physical 0?
|
||||
*
|
||||
* Common setup before any secondaries are started
|
||||
@ -145,14 +145,14 @@ static void __init bcm1480_smp_setup(void)
|
||||
{
|
||||
int i, num;
|
||||
|
||||
cpus_clear(phys_cpu_present_map);
|
||||
cpu_set(0, phys_cpu_present_map);
|
||||
cpus_clear(cpu_possible_map);
|
||||
cpu_set(0, cpu_possible_map);
|
||||
__cpu_number_map[0] = 0;
|
||||
__cpu_logical_map[0] = 0;
|
||||
|
||||
for (i = 1, num = 0; i < NR_CPUS; i++) {
|
||||
if (cfe_cpu_stop(i) == 0) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
cpu_set(i, cpu_possible_map);
|
||||
__cpu_number_map[i] = ++num;
|
||||
__cpu_logical_map[num] = i;
|
||||
}
|
||||
|
@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq);
|
||||
static void disable_sb1250_irq(unsigned int irq);
|
||||
static void ack_sb1250_irq(unsigned int irq);
|
||||
#ifdef CONFIG_SMP
|
||||
static void sb1250_set_affinity(unsigned int irq, cpumask_t mask);
|
||||
static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SIBYTE_HAS_LDT
|
||||
@ -103,16 +103,16 @@ void sb1250_unmask_irq(int cpu, int irq)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void sb1250_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
int i = 0, old_cpu, cpu, int_on;
|
||||
u64 cur_ints;
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
unsigned long flags;
|
||||
|
||||
i = first_cpu(mask);
|
||||
i = cpumask_first(mask);
|
||||
|
||||
if (cpus_weight(mask) > 1) {
|
||||
if (cpumask_weight(mask) > 1) {
|
||||
printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
|
||||
return;
|
||||
}
|
||||
|
@ -124,7 +124,7 @@ static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
|
||||
|
||||
/*
|
||||
* Use CFE to find out how many CPUs are available, setting up
|
||||
* phys_cpu_present_map and the logical/physical mappings.
|
||||
* cpu_possible_map and the logical/physical mappings.
|
||||
* XXXKW will the boot CPU ever not be physical 0?
|
||||
*
|
||||
* Common setup before any secondaries are started
|
||||
@ -133,14 +133,14 @@ static void __init sb1250_smp_setup(void)
|
||||
{
|
||||
int i, num;
|
||||
|
||||
cpus_clear(phys_cpu_present_map);
|
||||
cpu_set(0, phys_cpu_present_map);
|
||||
cpus_clear(cpu_possible_map);
|
||||
cpu_set(0, cpu_possible_map);
|
||||
__cpu_number_map[0] = 0;
|
||||
__cpu_logical_map[0] = 0;
|
||||
|
||||
for (i = 1, num = 0; i < NR_CPUS; i++) {
|
||||
if (cfe_cpu_stop(i) == 0) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
cpu_set(i, cpu_possible_map);
|
||||
__cpu_number_map[i] = ++num;
|
||||
__cpu_logical_map[num] = i;
|
||||
}
|
||||
|
@ -80,7 +80,7 @@ static void __init sni_a20r_timer_setup(void)
|
||||
struct irqaction *action = &a20r_irqaction;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
clockevents_register_device(cd);
|
||||
action->dev_id = cd;
|
||||
setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
|
||||
|
@ -11,6 +11,7 @@ config PARISC
|
||||
select HAVE_OPROFILE
|
||||
select RTC_CLASS
|
||||
select RTC_DRV_PARISC
|
||||
select INIT_ALL_POSSIBLE
|
||||
help
|
||||
The PA-RISC microprocessor is designed by Hewlett-Packard and used
|
||||
in many of their workstations & servers (HP9000 700 and 800 series,
|
||||
|
@ -131,12 +131,12 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
|
||||
static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
|
||||
{
|
||||
if (cpu_check_affinity(irq, &dest))
|
||||
if (cpu_check_affinity(irq, dest))
|
||||
return;
|
||||
|
||||
irq_desc[irq].affinity = dest;
|
||||
irq_desc[irq].affinity = *dest;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -67,21 +67,6 @@ static volatile int cpu_now_booting __read_mostly = 0; /* track which CPU is boo
|
||||
|
||||
static int parisc_max_cpus __read_mostly = 1;
|
||||
|
||||
/* online cpus are ones that we've managed to bring up completely
|
||||
* possible cpus are all valid cpu
|
||||
* present cpus are all detected cpu
|
||||
*
|
||||
* On startup we bring up the "possible" cpus. Since we discover
|
||||
* CPUs later, we add them as hotplug, so the possible cpu mask is
|
||||
* empty in the beginning.
|
||||
*/
|
||||
|
||||
cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; /* Bitmap of online CPUs */
|
||||
cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; /* Bitmap of Present CPUs */
|
||||
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
|
||||
|
||||
enum ipi_message_type {
|
||||
|
@ -48,7 +48,6 @@ static inline int pcibus_to_node(struct pci_bus *bus)
|
||||
|
||||
/* sched_domains SD_NODE_INIT for PPC64 machines */
|
||||
#define SD_NODE_INIT (struct sched_domain) { \
|
||||
.span = CPU_MASK_NONE, \
|
||||
.parent = NULL, \
|
||||
.child = NULL, \
|
||||
.groups = NULL, \
|
||||
|
@ -237,7 +237,7 @@ void fixup_irqs(cpumask_t map)
|
||||
mask = map;
|
||||
}
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq, mask);
|
||||
irq_desc[irq].chip->set_affinity(irq, &mask);
|
||||
else if (irq_desc[irq].action && !(warned++))
|
||||
printk("Cannot set affinity for irq %i\n", irq);
|
||||
}
|
||||
|
@ -59,13 +59,9 @@
|
||||
|
||||
struct thread_info *secondary_ti;
|
||||
|
||||
cpumask_t cpu_possible_map = CPU_MASK_NONE;
|
||||
cpumask_t cpu_online_map = CPU_MASK_NONE;
|
||||
DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
|
||||
DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE;
|
||||
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
|
||||
EXPORT_PER_CPU_SYMBOL(cpu_core_map);
|
||||
|
||||
|
@ -844,7 +844,7 @@ static void register_decrementer_clockevent(int cpu)
|
||||
struct clock_event_device *dec = &per_cpu(decrementers, cpu).event;
|
||||
|
||||
*dec = decrementer_clockevent;
|
||||
dec->cpumask = cpumask_of_cpu(cpu);
|
||||
dec->cpumask = cpumask_of(cpu);
|
||||
|
||||
printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n",
|
||||
dec->name, dec->mult, dec->shift, cpu);
|
||||
|
@ -332,7 +332,7 @@ static void xics_eoi_lpar(unsigned int virq)
|
||||
lpar_xirr_info_set((0xff << 24) | irq);
|
||||
}
|
||||
|
||||
static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
|
||||
static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
|
||||
{
|
||||
unsigned int irq;
|
||||
int status;
|
||||
@ -870,7 +870,7 @@ void xics_migrate_irqs_away(void)
|
||||
|
||||
/* Reset affinity to all cpus */
|
||||
irq_desc[virq].affinity = CPU_MASK_ALL;
|
||||
desc->chip->set_affinity(virq, CPU_MASK_ALL);
|
||||
desc->chip->set_affinity(virq, cpu_all_mask);
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
}
|
||||
|
@ -806,7 +806,7 @@ static void mpic_end_ipi(unsigned int irq)
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
{
|
||||
struct mpic *mpic = mpic_from_irq(irq);
|
||||
unsigned int src = mpic_irq_to_hw(irq);
|
||||
@ -818,7 +818,7 @@ void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
} else {
|
||||
cpumask_t tmp;
|
||||
|
||||
cpus_and(tmp, cpumask, cpu_online_map);
|
||||
cpumask_and(&tmp, cpumask, cpu_online_mask);
|
||||
|
||||
mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
|
||||
mpic_physmask(cpus_addr(tmp)[0]));
|
||||
|
@ -36,6 +36,6 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
|
||||
|
||||
extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
|
||||
extern void mpic_set_vector(unsigned int virq, unsigned int vector);
|
||||
extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
|
||||
extern void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
|
||||
|
||||
#endif /* _POWERPC_SYSDEV_MPIC_H */
|
||||
|
@ -83,6 +83,7 @@ config S390
|
||||
select HAVE_KRETPROBES
|
||||
select HAVE_KVM if 64BIT
|
||||
select HAVE_ARCH_TRACEHOOK
|
||||
select INIT_ALL_POSSIBLE
|
||||
|
||||
source "init/Kconfig"
|
||||
|
||||
|
@ -55,12 +55,6 @@
|
||||
struct _lowcore *lowcore_ptr[NR_CPUS];
|
||||
EXPORT_SYMBOL(lowcore_ptr);
|
||||
|
||||
cpumask_t cpu_online_map = CPU_MASK_NONE;
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
|
||||
cpumask_t cpu_possible_map = CPU_MASK_ALL;
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
static struct task_struct *current_set[NR_CPUS];
|
||||
|
||||
static u8 smp_cpu_type;
|
||||
|
@ -160,7 +160,7 @@ void init_cpu_timer(void)
|
||||
cd->min_delta_ns = 1;
|
||||
cd->max_delta_ns = LONG_MAX;
|
||||
cd->rating = 400;
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
cd->cpumask = cpumask_of(cpu);
|
||||
cd->set_next_event = s390_next_event;
|
||||
cd->set_mode = s390_set_mode;
|
||||
|
||||
|
@ -31,7 +31,7 @@ enum {
|
||||
};
|
||||
|
||||
void smp_message_recv(unsigned int msg);
|
||||
void smp_timer_broadcast(cpumask_t mask);
|
||||
void smp_timer_broadcast(const struct cpumask *mask);
|
||||
|
||||
void local_timer_interrupt(void);
|
||||
void local_timer_setup(unsigned int cpu);
|
||||
|
@ -5,7 +5,6 @@
|
||||
|
||||
/* sched_domains SD_NODE_INIT for sh machines */
|
||||
#define SD_NODE_INIT (struct sched_domain) { \
|
||||
.span = CPU_MASK_NONE, \
|
||||
.parent = NULL, \
|
||||
.child = NULL, \
|
||||
.groups = NULL, \
|
||||
|
@ -31,12 +31,6 @@
|
||||
int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
|
||||
int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
|
||||
|
||||
cpumask_t cpu_possible_map;
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
cpumask_t cpu_online_map;
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
|
||||
static inline void __init smp_store_cpu_info(unsigned int cpu)
|
||||
{
|
||||
struct sh_cpuinfo *c = cpu_data + cpu;
|
||||
@ -190,11 +184,11 @@ void arch_send_call_function_single_ipi(int cpu)
|
||||
plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE);
|
||||
}
|
||||
|
||||
void smp_timer_broadcast(cpumask_t mask)
|
||||
void smp_timer_broadcast(const struct cpumask *mask)
|
||||
{
|
||||
int cpu;
|
||||
|
||||
for_each_cpu_mask(cpu, mask)
|
||||
for_each_cpu(cpu, mask)
|
||||
plat_send_ipi(cpu, SMP_MSG_TIMER);
|
||||
}
|
||||
|
||||
|
@ -51,7 +51,7 @@ void __cpuinit local_timer_setup(unsigned int cpu)
|
||||
clk->mult = 1;
|
||||
clk->set_mode = dummy_timer_set_mode;
|
||||
clk->broadcast = smp_timer_broadcast;
|
||||
clk->cpumask = cpumask_of_cpu(cpu);
|
||||
clk->cpumask = cpumask_of(cpu);
|
||||
|
||||
clockevents_register_device(clk);
|
||||
}
|
||||
|
@ -263,7 +263,7 @@ static int tmu_timer_init(void)
|
||||
tmu0_clockevent.min_delta_ns =
|
||||
clockevent_delta2ns(1, &tmu0_clockevent);
|
||||
|
||||
tmu0_clockevent.cpumask = cpumask_of_cpu(0);
|
||||
tmu0_clockevent.cpumask = cpumask_of(0);
|
||||
|
||||
clockevents_register_device(&tmu0_clockevent);
|
||||
|
||||
|
@ -29,8 +29,6 @@
|
||||
*/
|
||||
|
||||
extern unsigned char boot_cpu_id;
|
||||
extern cpumask_t phys_cpu_present_map;
|
||||
#define cpu_possible_map phys_cpu_present_map
|
||||
|
||||
typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
|
||||
unsigned long, unsigned long);
|
||||
|
@ -312,7 +312,8 @@ static void sun4u_irq_enable(unsigned int virt_irq)
|
||||
}
|
||||
}
|
||||
|
||||
static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4u_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
sun4u_irq_enable(virt_irq);
|
||||
}
|
||||
@ -362,7 +363,8 @@ static void sun4v_irq_enable(unsigned int virt_irq)
|
||||
ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4v_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq);
|
||||
@ -429,7 +431,8 @@ static void sun4v_virq_enable(unsigned int virt_irq)
|
||||
dev_handle, dev_ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4v_virt_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned long cpuid, dev_handle, dev_ino;
|
||||
int err;
|
||||
@ -851,7 +854,7 @@ void fixup_irqs(void)
|
||||
!(irq_desc[irq].status & IRQ_PER_CPU)) {
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq,
|
||||
irq_desc[irq].affinity);
|
||||
&irq_desc[irq].affinity);
|
||||
}
|
||||
spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
|
||||
}
|
||||
|
@ -780,7 +780,7 @@ out:
|
||||
if (nid != -1) {
|
||||
cpumask_t numa_mask = node_to_cpumask(nid);
|
||||
|
||||
irq_set_affinity(irq, numa_mask);
|
||||
irq_set_affinity(irq, &numa_mask);
|
||||
}
|
||||
|
||||
return irq;
|
||||
|
@ -288,7 +288,7 @@ static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
|
||||
if (nid != -1) {
|
||||
cpumask_t numa_mask = node_to_cpumask(nid);
|
||||
|
||||
irq_set_affinity(irq, numa_mask);
|
||||
irq_set_affinity(irq, &numa_mask);
|
||||
}
|
||||
err = request_irq(irq, sparc64_msiq_interrupt, 0,
|
||||
"MSIQ",
|
||||
|
@ -39,8 +39,6 @@ volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};
|
||||
unsigned char boot_cpu_id = 0;
|
||||
unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */
|
||||
|
||||
cpumask_t cpu_online_map = CPU_MASK_NONE;
|
||||
cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
|
||||
cpumask_t smp_commenced_mask = CPU_MASK_NONE;
|
||||
|
||||
/* The only guaranteed locking primitive available on all Sparc
|
||||
@ -334,7 +332,7 @@ void __init smp_setup_cpu_possible_map(void)
|
||||
instance = 0;
|
||||
while (!cpu_find_by_instance(instance, NULL, &mid)) {
|
||||
if (mid < NR_CPUS) {
|
||||
cpu_set(mid, phys_cpu_present_map);
|
||||
cpu_set(mid, cpu_possible_map);
|
||||
cpu_set(mid, cpu_present_map);
|
||||
}
|
||||
instance++;
|
||||
@ -354,7 +352,7 @@ void __init smp_prepare_boot_cpu(void)
|
||||
|
||||
current_thread_info()->cpu = cpuid;
|
||||
cpu_set(cpuid, cpu_online_map);
|
||||
cpu_set(cpuid, phys_cpu_present_map);
|
||||
cpu_set(cpuid, cpu_possible_map);
|
||||
}
|
||||
|
||||
int __cpuinit __cpu_up(unsigned int cpu)
|
||||
|
@ -49,14 +49,10 @@
|
||||
|
||||
int sparc64_multi_core __read_mostly;
|
||||
|
||||
cpumask_t cpu_possible_map __read_mostly = CPU_MASK_NONE;
|
||||
cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
|
||||
DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
|
||||
cpumask_t cpu_core_map[NR_CPUS] __read_mostly =
|
||||
{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
|
||||
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
|
||||
EXPORT_SYMBOL(cpu_core_map);
|
||||
|
||||
|
@ -112,10 +112,6 @@ EXPORT_PER_CPU_SYMBOL(__cpu_data);
|
||||
#ifdef CONFIG_SMP
|
||||
/* IRQ implementation. */
|
||||
EXPORT_SYMBOL(synchronize_irq);
|
||||
|
||||
/* CPU online map and active count. */
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
EXPORT_SYMBOL(phys_cpu_present_map);
|
||||
#endif
|
||||
|
||||
EXPORT_SYMBOL(__udelay);
|
||||
|
@ -763,7 +763,7 @@ void __devinit setup_sparc64_timer(void)
|
||||
sevt = &__get_cpu_var(sparc64_events);
|
||||
|
||||
memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
|
||||
sevt->cpumask = cpumask_of_cpu(smp_processor_id());
|
||||
sevt->cpumask = cpumask_of(smp_processor_id());
|
||||
|
||||
clockevents_register_device(sevt);
|
||||
}
|
||||
|
@ -25,13 +25,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
|
||||
#include "irq_user.h"
|
||||
#include "os.h"
|
||||
|
||||
/* CPU online map, set by smp_boot_cpus */
|
||||
cpumask_t cpu_online_map = CPU_MASK_NONE;
|
||||
cpumask_t cpu_possible_map = CPU_MASK_NONE;
|
||||
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
EXPORT_SYMBOL(cpu_possible_map);
|
||||
|
||||
/* Per CPU bogomips and other parameters
|
||||
* The only piece used here is the ipi pipe, which is set before SMP is
|
||||
* started and never changed.
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user