forked from Minki/linux
perf_counter: abstract wakeup flag setting in core to fix powerpc build
Impact: build fix for powerpc Commit bd753921015e7905 ("perf_counter: software counter event infrastructure") introduced a use of TIF_PERF_COUNTERS into the core perfcounter code. This breaks the build on powerpc because we use a flag in a per-cpu area to signal wakeups on powerpc rather than a thread_info flag, because the thread_info flags have to be manipulated with atomic operations and are thus slower than per-cpu flags. This fixes the by changing the core to use an abstracted set_perf_counter_pending() function, which is defined on x86 to set the TIF_PERF_COUNTERS flag and on powerpc to set the per-cpu flag (paca->perf_counter_pending). It changes the previous powerpc definition of set_perf_counter_pending to not take an argument and adds a clear_perf_counter_pending, so as to simplify the definition on x86. On x86, set_perf_counter_pending() is defined as a macro. Defining it as a static inline in arch/x86/include/asm/perf_counters.h causes compile failures because <asm/perf_counters.h> gets included early in <linux/sched.h>, and the definitions of set_tsk_thread_flag etc. are therefore not available in <asm/perf_counters.h>. (On powerpc this problem is avoided by defining set_perf_counter_pending etc. in <asm/hw_irq.h>.) Signed-off-by: Paul Mackerras <paulus@samba.org>
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7bb497bd88
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@ -142,10 +142,17 @@ static inline unsigned long get_perf_counter_pending(void)
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return x;
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}
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static inline void set_perf_counter_pending(int x)
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static inline void set_perf_counter_pending(void)
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{
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asm volatile("stb %0,%1(13)" : :
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"r" (x),
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"r" (1),
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"i" (offsetof(struct paca_struct, perf_counter_pending)));
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}
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static inline void clear_perf_counter_pending(void)
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{
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asm volatile("stb %0,%1(13)" : :
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"r" (0),
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"i" (offsetof(struct paca_struct, perf_counter_pending)));
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}
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@ -158,7 +165,8 @@ static inline unsigned long get_perf_counter_pending(void)
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return 0;
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}
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static inline void set_perf_counter_pending(int x) {}
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static inline void set_perf_counter_pending(void) {}
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static inline void clear_perf_counter_pending(void) {}
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static inline void perf_counter_do_pending(void) {}
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#endif /* CONFIG_PERF_COUNTERS */
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@ -104,13 +104,6 @@ static inline notrace void set_soft_enabled(unsigned long enable)
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: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
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}
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#ifdef CONFIG_PERF_COUNTERS
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notrace void __weak perf_counter_do_pending(void)
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{
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set_perf_counter_pending(0);
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}
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#endif
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notrace void raw_local_irq_restore(unsigned long en)
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{
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/*
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@ -142,8 +135,10 @@ notrace void raw_local_irq_restore(unsigned long en)
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iseries_handle_interrupts();
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}
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if (get_perf_counter_pending())
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if (get_perf_counter_pending()) {
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clear_perf_counter_pending();
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perf_counter_do_pending();
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}
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/*
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* if (get_paca()->hard_enabled) return;
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@ -653,7 +653,6 @@ void perf_counter_do_pending(void)
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struct cpu_hw_counters *cpuhw = &__get_cpu_var(cpu_hw_counters);
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struct perf_counter *counter;
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set_perf_counter_pending(0);
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for (i = 0; i < cpuhw->n_counters; ++i) {
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counter = cpuhw->counter[i];
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if (counter && counter->wakeup_pending) {
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@ -811,7 +810,7 @@ static void perf_counter_interrupt(struct pt_regs *regs)
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perf_counter_do_pending();
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irq_exit();
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} else {
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set_perf_counter_pending(1);
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set_perf_counter_pending();
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}
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}
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}
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@ -84,6 +84,9 @@ union cpuid10_edx {
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#define MSR_ARCH_PERFMON_FIXED_CTR2 0x30b
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#define X86_PMC_IDX_FIXED_BUS_CYCLES (X86_PMC_IDX_FIXED + 2)
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#define set_perf_counter_pending() \
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set_tsk_thread_flag(current, TIF_PERF_COUNTERS);
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#ifdef CONFIG_PERF_COUNTERS
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extern void init_hw_perf_counters(void);
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extern void perf_counters_lapic_init(int nmi);
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@ -1433,7 +1433,7 @@ static void perf_swcounter_interrupt(struct perf_counter *counter,
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if (nmi) {
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counter->wakeup_pending = 1;
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set_tsk_thread_flag(current, TIF_PERF_COUNTERS);
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set_perf_counter_pending();
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} else
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wake_up(&counter->waitq);
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}
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