leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drm/i915/uc: Separate firmware selection and preparation

Browse Source 
intel_{h,g}uc_init_fw selects correct firmware and then triggers it's
preparation (fetch + initial parsing).

This change separates out select steps, so those can be called by
the sanitize_options().

Then, during the init_fw(), we prepare the firmware if the firmware was
selected.

Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
This commit is contained in:
Arkadiusz Hiler 2017-03-14 15:28:13 +01:00 committed by Joonas Lahtinen
parent 8fc2a4e427
commit b551f610b3
4 changed files with 21 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/drm/i915/intel_guc_loader.c
View File

@ -393,15 +393,12 @@ int intel_guc_init_hw(struct intel_guc *guc)
} }
/** /**
* intel_guc_init_fw() - select and prepare firmware for loading * intel_guc_select_fw() - selects GuC firmware for loading
* @guc: intel_guc struct * @guc: intel_guc struct
* *
* Called early during driver load, but after GEM is initialised. * Return: zero when we know firmware, non-zero in other case
*
* The firmware will be transferred to the GuC's memory later,
* when intel_guc_init_hw() is called.
*/ */
void intel_guc_init_fw(struct intel_guc *guc) int intel_guc_select_fw(struct intel_guc *guc)
{ {
struct drm_i915_private *dev_priv = guc_to_i915(guc); struct drm_i915_private *dev_priv = guc_to_i915(guc);
@ -424,11 +421,10 @@ void intel_guc_init_fw(struct intel_guc *guc)
guc->fw.minor_ver_wanted = KBL_FW_MINOR; guc->fw.minor_ver_wanted = KBL_FW_MINOR;
} else { } else {
DRM_ERROR("No GuC firmware known for platform with GuC!\n"); DRM_ERROR("No GuC firmware known for platform with GuC!\n");
i915.enable_guc_loading = 0; return -ENOENT;
return;
} }
intel_uc_prepare_fw(dev_priv, &guc->fw); return 0;
} }
/** /**

14
drivers/gpu/drm/i915/intel_huc.c
View File

@ -141,18 +141,10 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv)
} }
/** /**
* intel_huc_init_fw() - select and prepare firmware for loading * intel_huc_select_fw() - selects HuC firmware for loading
* @huc: intel_huc struct * @huc: intel_huc struct
*
* Called early during driver load, but after GEM is initialised. The loading
* will continue only when driver explicitly specify firmware name and version.
* All other cases are considered as INTEL_UC_FIRMWARE_NONE either because HW
* is not capable or driver yet support it. And there will be no error message
* for INTEL_UC_FIRMWARE_NONE cases.
*
* The DMA-copying to HW is done later when intel_huc_init_hw() is called.
*/ */
void intel_huc_init_fw(struct intel_huc *huc) void intel_huc_select_fw(struct intel_huc *huc)
{ {
struct drm_i915_private *dev_priv = huc_to_i915(huc); struct drm_i915_private *dev_priv = huc_to_i915(huc);
@ -177,8 +169,6 @@ void intel_huc_init_fw(struct intel_huc *huc)
DRM_ERROR("No HuC firmware known for platform with HuC!\n"); DRM_ERROR("No HuC firmware known for platform with HuC!\n");
return; return;
} }
intel_uc_prepare_fw(dev_priv, &huc->fw);
} }
/** /**

18
drivers/gpu/drm/i915/intel_uc.c
View File

@ -66,6 +66,14 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
if (!i915.enable_guc_loading) if (!i915.enable_guc_loading)
i915.enable_guc_submission = 0; i915.enable_guc_submission = 0;
} }
if (i915.enable_guc_loading) {
if (HAS_HUC_UCODE(dev_priv))
intel_huc_select_fw(&dev_priv->huc);
if (intel_guc_select_fw(&dev_priv->guc))
i915.enable_guc_loading = 0;
}
} }
void intel_uc_init_early(struct drm_i915_private *dev_priv) void intel_uc_init_early(struct drm_i915_private *dev_priv)
@ -75,13 +83,11 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
void intel_uc_init_fw(struct drm_i915_private *dev_priv) void intel_uc_init_fw(struct drm_i915_private *dev_priv)
{ {
if (!i915.enable_guc_loading) if (dev_priv->huc.fw.path)
return; intel_uc_prepare_fw(dev_priv, &dev_priv->huc.fw);
if (HAS_HUC_UCODE(dev_priv)) if (dev_priv->guc.fw.path)
intel_huc_init_fw(&dev_priv->huc); intel_uc_prepare_fw(dev_priv, &dev_priv->guc.fw);
intel_guc_init_fw(&dev_priv->guc);
} }
int intel_uc_init_hw(struct drm_i915_private *dev_priv) int intel_uc_init_hw(struct drm_i915_private *dev_priv)

4
drivers/gpu/drm/i915/intel_uc.h
View File

@ -194,7 +194,7 @@ int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc); int intel_guc_sample_forcewake(struct intel_guc *guc);
/* intel_guc_loader.c */ /* intel_guc_loader.c */
void intel_guc_init_fw(struct intel_guc *guc); int intel_guc_select_fw(struct intel_guc *guc);
int intel_guc_init_hw(struct intel_guc *guc); int intel_guc_init_hw(struct intel_guc *guc);
void intel_guc_fini(struct drm_i915_private *dev_priv); void intel_guc_fini(struct drm_i915_private *dev_priv);
const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status); const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
@ -226,7 +226,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
} }
/* intel_huc.c */ /* intel_huc.c */
void intel_huc_init_fw(struct intel_huc *huc); void intel_huc_select_fw(struct intel_huc *huc);
void intel_huc_fini(struct drm_i915_private *dev_priv); void intel_huc_fini(struct drm_i915_private *dev_priv);
int intel_huc_init_hw(struct intel_huc *huc); int intel_huc_init_hw(struct intel_huc *huc);
void intel_guc_auth_huc(struct drm_i915_private *dev_priv); void intel_guc_auth_huc(struct drm_i915_private *dev_priv);