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ata: ahci_brcmstb: add a quirk for MIPS-based platforms

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Whereas ARM-based platforms have four phy interface registers and
information, the MIPS-based platforms have only three registers, and
there are no information and documentation. In the original BSP, It
using "strict-ahci" did not control these registers.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Jaedon Shin 2015-11-26 11:56:31 +09:00 committed by Tejun Heo
parent 7de3244530
commit b46f79bc78
1 changed files with 10 additions and 1 deletions
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11
drivers/ata/ahci_brcmstb.c
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@ -71,6 +71,7 @@
enum brcm_ahci_quirks {
BRCM_AHCI_QUIRK_NO_NCQ = BIT(0),
BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE = BIT(1),
};
struct brcm_ahci_priv {
@ -119,6 +120,9 @@ static void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port)
void __iomem *p;
u32 reg;
if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
return;
/* clear PHY_DEFAULT_POWER_STATE */
p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_1;
reg = brcm_sata_readreg(p);
@ -148,6 +152,9 @@ static void brcm_sata_phy_disable(struct brcm_ahci_priv *priv, int port)
void __iomem *p;
u32 reg;
if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
return;
/* power-off the PHY digital logic */
p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_2;
reg = brcm_sata_readreg(p);
@ -261,8 +268,10 @@ static int brcm_ahci_probe(struct platform_device *pdev)
if (IS_ERR(priv->top_ctrl))
return PTR_ERR(priv->top_ctrl);
if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci"))
if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci")) {
priv->quirks |= BRCM_AHCI_QUIRK_NO_NCQ;
priv->quirks |= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;
}
brcm_sata_init(priv);