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OMAP4: Smartreflex framework extensions

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This patch extends the smartreflex framework to support
OMAP4. The changes are minor like compiling smartreflex Kconfig
option for OMAP4 also, and a couple of OMAP4 checks in
the smartreflex framework.

The change in sr_device.c where new logic has to be introduced
for reading the efuse registers is due to the fact that in OMAP4
the efuse registers are 24 bit aligned. A __raw_readl will
fail for non-32 bit aligned address and hence the 8-bit read
and shift.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Thara Gopinath
2010-08-18 12:23:12 +05:30
committed by Kevin Hilman
parent fb200cfb23
commit b35cecf978
3 changed files with 23 additions and 4 deletions
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17
arch/arm/mach-omap2/sr_device.c
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@@ -20,6 +20,7 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <plat/omap_device.h>
#include <plat/smartreflex.h>
@@ -51,7 +52,21 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
GFP_KERNEL);
for (i = 0; i < count; i++) {
u32 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
u32 v;
/*
* In OMAP4 the efuse registers are 24 bit aligned.
* A __raw_readl will fail for non-32 bit aligned address
* and hence the 8-bit read and shift.
*/
if (cpu_is_omap44xx()) {
u16 offset = volt_data[i].sr_efuse_offs;
v = omap_ctrl_readb(offset) |
omap_ctrl_readb(offset + 1) << 8 |
omap_ctrl_readb(offset + 2) << 16;
} else {
v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
}
nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs;
nvalue_table[i].nvalue = v;