PCI: Move enum pci_interrupt_pin to linux/pci.h
We currently have a definition of enum pci_interrupt_pin in a header specific to PCI endpoints - linux/pci-epf.h. In order to allow for use of this enum from PCI host code in a future commit, move its definition to linux/pci.h & include that from linux/pci-epf.h. Additionally we add a PCI_NUM_INTX macro which indicates the number of PCI INTx interrupts, and will be used alongside enum pci_interrupt_pin in further patches. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [bhelgaas: move enum pci_interrupt_pin outside #ifdef CONFIG_PCI] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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committed by
Bjorn Helgaas
parent
16f73eb02d
commit
b352baf15b
@@ -14,17 +14,10 @@
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#include <linux/device.h>
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#include <linux/device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pci.h>
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struct pci_epf;
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struct pci_epf;
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enum pci_interrupt_pin {
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PCI_INTERRUPT_UNKNOWN,
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PCI_INTERRUPT_INTA,
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PCI_INTERRUPT_INTB,
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PCI_INTERRUPT_INTC,
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PCI_INTERRUPT_INTD,
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};
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enum pci_barno {
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enum pci_barno {
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BAR_0,
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BAR_0,
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BAR_1,
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BAR_1,
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@@ -102,6 +102,28 @@ enum {
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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};
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};
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/**
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* enum pci_interrupt_pin - PCI INTx interrupt values
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* @PCI_INTERRUPT_UNKNOWN: Unknown or unassigned interrupt
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* @PCI_INTERRUPT_INTA: PCI INTA pin
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* @PCI_INTERRUPT_INTB: PCI INTB pin
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* @PCI_INTERRUPT_INTC: PCI INTC pin
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* @PCI_INTERRUPT_INTD: PCI INTD pin
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*
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* Corresponds to values for legacy PCI INTx interrupts, as can be found in the
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* PCI_INTERRUPT_PIN register.
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*/
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enum pci_interrupt_pin {
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PCI_INTERRUPT_UNKNOWN,
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PCI_INTERRUPT_INTA,
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PCI_INTERRUPT_INTB,
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PCI_INTERRUPT_INTC,
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PCI_INTERRUPT_INTD,
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};
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/* The number of legacy PCI INTx interrupts */
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#define PCI_NUM_INTX 4
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/*
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/*
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* and Control/Status PowerState fields in the Power Management capability.
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* and Control/Status PowerState fields in the Power Management capability.
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